The condition code is set to reflect the state of
the reference and change bits before the reference
bit is set to zero.
Resulting Condition Code:
o Reference bit zero, change bit zero
1 Reference bit zero, change bit one
2 Reference bit one, change bit zero
3 Reference bit one, change bit one
Program Exceptions: Operatilon (if the translation feature is not in­
stalled) Privileged operation
Access (addressing for operand access only, oper­
and 2)
Set Clock [S] C==._B2_04 __ __ D_2 o 16 20 31
The current value of the time-of -day clock is re­
placed by the contents of the doubleword designated
by the second-operand address, and the clock is
placed in the stopped state.
The operand designated by the instruction is con­
sidered an unsigned, 64-bit, fixed-point This operand replaces the contents of the clock, as
determined by the clock's resolution. Only those bits
of the operand are set in the clock that correspond
to the bit positions to be updated by the clock; the
contents of the remaining rightmost bit positions are
not preserved in the clock and are ignored.
After the clock value is set, the clock is placed in
the stopped state. The clock leaves the stopped state
to enter the set state and resume counting under control of the time-of -day clock control bi1c (control register 0, bit 2). When the bit
is zero or the clock-synchronization facility is not
installed, the clock enters the set state at the cO!11ple­ tion of the instruction. When the bit is one, the
clock remains in the stopped state either until the bit
is set to zero or until any other running time-oI-day
clock in the configured system is incremented to a
value of aU zeros in bit positions 32-63.
The value of the clock is changed, and the clock is
placed in the stopped state only if the TOD-clock
switch on the system console is in the enable-set
position. If the switch is in the secure position, the
value and the state of the clock are not changed. The
two results are distinguished by condition codes 0 108 System/370 Principles of Operation
and 1, respectively. When the clock is not opera­
tional, regardless of the setting of the TOD-clock
switch, the value and the state of the clock are not
changed, and condition code 3 is set.
The operand must be designated on a doubleword
boundary; otherwise, a specification exception is
recognized, and the operation is suppressed. Access
exceptions are recognized regardless of the state of
the clock and the setting of the TOD-clock switch.
Resulting Condition Code:
o Clock value set
1 Clock value secure
2 -
3 Clock not operational
Program Exceptions:
Privileged operation
Access (fetch, operand 2)
Specification
Set Clock Comparator SCKC [S] B206 o 16 20 31
The current value of the clock comparator is re­
placed by the contents of the doubleword designated
by the second-operand address. Only those bits of the operand are set in the clock
comparator that correspond to the bit positions to be
compared with the time-of -day clock; the contents
of the remaining rightmost bit positions are ignored
and are not preserved in the clock comparator.
The operand must be designated on a doubleword
boundary; otherwise, a specification exception is
recognized, and the operation is suppressed. The
operation is suppressed on protection and addressing
exceptions.
Condition Code: The code remains unchanged.
Program Exceptions:
Operation (if the clock comparator is not in-
stalled)
Privileged operation
Access (fetch, operand 2)
Specification
Set CPU Timer
[S] 8208 o 16 20 The current value of the CPU timer is replaced by
the contents of the doubleword designated by the
second-operand address.
31 Only those bits of the operand are set in the CPU timer that correspond to the bit positions to be up­
dated; the contents of the remaining rightmost bit
positions are ignored and are not preserved in the CPU timer.
The operand must be designated on a doubleword
boundary; otherwise, a specification exception is
recognized, and the operation is suppressed. The
operation is suppressed on protection and addressing
exceptions.
Condition Code: The code remains unchanged.
Program Exceptions: Operation (if the CPU timer is not installed)
Privileged operation
Access (fetch, operand 2)
Specification
Set Prefix SPX [S] 8210 o 16 20 31
The contents of the prefix register are replaced by
the contents of bit positions 8-19 of the word at the
location designated by the second-operand address.
All information in the translation-Iookaside buffer
(TLB) of this CPU is made invalid.
If the operation is completed, the new prefix is
used for any interruptions following the execution of
the instruction and for the execution of subsequent
instructions. The contents of bit positions 0-7 and 20-31 of the operand are ignored.
The TLB, if the CPU has one, appears cleared of
its original contents for all following instructions.
A serialization function is p.erformed. CPU oper­
ation is delayed until all previous accesses by this CPU to main storage have been completed, as ob­
served by channels and other CPUs. No subsequent
instructions, operands, or dynamic-address-
translation entries are fetched by this CPU until the
execution of this instruction is completed.
The operand must be designated on a word
boundary; otherwise, a specification exception is
recognized, and the operation is suppressed. The
operation is suppressed on protection and addressing
exceptions.
Condition Code: The code remains unchanged.
Program Exceptions: Operation (if the multiprocessing feature is not
installed)
Privileged operation
Access (fetch, operand 2)
Specification
Set PSW Key From Address SPKA [S] 820A o 16 20 The four-bit protection key of the current PSW is
replaced by bits 24-27 of the operand address.
The second-operand address is not used to ad­
dress data; instead, bits 24-27 of the address form
the new key. Bits 8-23 and 28-31 of the second­
operand address are ignored.
Resulting Condition Code: The code remains un­
changed.
Program Exceptions: 31 Operation (if the PSW -key-handling feature is not
installed)
Privileged operation
Programming Notes
The format of the SPKA instruction permits the
program to set the protection key either from the
general register designated by the B2 field or from
the D2 field in the instruction itself.
When a problem program requests the supervisor
program to access a location specified by the prob­
lem program, the SPKA instruction can be used by
the supervisor program to verify that the problem
program is authorized to make this access, provided
the supervisor program is not protected against
fetching. The supervisor program can perform the
verification by replacing the PSW key of the supervi­
sor program with the problem-program key before
making the access and subsequently restoring the
System-Control Instructions 109
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