Programming Notes
The program should allow for the possibility that theCPU identification number may contain the digits
A-F as well as the digits0-9. The principal uses of the information stored by
the instructionSTORE CPU ID are the following:
1. TheCPU identification number, combined with
the model number, provides a uniqueCPU identification that can be used in associating
results with an individual system, particularly
in regard to functional differences, perform
ance differences, and error handling.
2. The model number, in conjunction with the
version code, can be used by model
independent programs in determining which
model-dependent recovery programs should be
called.
3. The MCEL length can be used by model
independent programs to allocate main storage
for the MCEL area.
Store CPU Timer
[S]8209 o 16 20 The current value of the CPU timer is stored at the
double word designated by the second-operand ad
dress.
31
Zeros are provided for the rightmost bit positions
that are not updated by theCPU timer.
The operand must be designated on a doubleword
boundary; otherwise, a specification exception is
recognized, and the operation is suppressed. The
operation is suppressed on protection and addressing
exceptions.
Condition Code: The code remains unchanged.
Program Exceptions:
Operation (if theCPU timer is not installed)
Privileged operation
Access (store, operand 2)
Specification
Store Prefix
[S]
8211
o 1620 31
The contents of the prefix register are stored at the
word location designated by the second-operand
address. Zeros are provided for bit positions0-7 and 20-31. The operand must be designated on a word
boundary; otherwise, a specification exception is
recognized, and the operation is suppressed. The
operation is suppressed on protection and addressing
exceptions.
Condition Code: The code remains unchanged.Program Exceptions:
Operation (if the multiprocessing feature is not
installed)
Privileged operation
Access (store, operand 2)
Specification
Store Then AND System Mask
[SI]
AC 12 8,
o 8 1620 D, 31
Bits0-7 of the current PSW are stored at the first
operand location. Then the contents of bit positions0- 7 of the current PSW are replaced by the logical
product (AND) of their original contents and the
second operand.
The operation is suppressed on protection and
addressing exceptions.
Condition Code: The code remains unchanged.Program Exceptions:
Operation (if the translation feature is not in
stalled)
Privileged operation
Programming Note
TheSTORE THEN AND SYSTEM MASK instruc
tion permits the program to turn off selected bits in
the system mask while retaining the original contents
for later restoration. For example, in EC mode it
System-Control Instructions 113
The program should allow for the possibility that the
A-F as well as the digits
the instruction
1. The
the model number, provides a unique
results with an individual system, particularly
in regard to functional differences, perform
ance differences, and error handling.
2. The model number, in conjunction with the
version code, can be used by model
independent programs in determining which
model-dependent recovery programs should be
called.
3. The MCEL length can be used by model
independent programs to allocate main storage
for the MCEL area.
Store CPU Timer
[S]
double word designated by the second-operand ad
dress.
31
Zeros are provided for the rightmost bit positions
that are not updated by the
The operand must be designated on a doubleword
boundary; otherwise, a specification exception is
recognized, and the operation is suppressed. The
operation is suppressed on protection and addressing
exceptions.
Condition Code: The code remains unchanged.
Program Exceptions:
Operation (if the
Privileged operation
Access (store, operand 2)
Specification
Store Prefix
[S]
8211
o 16
The contents of the prefix register are stored at the
word location designated by the second-operand
address. Zeros are provided for bit positions
boundary; otherwise, a specification exception is
recognized, and the operation is suppressed. The
operation is suppressed on protection and addressing
exceptions.
Condition Code: The code remains unchanged.
Operation (if the multiprocessing feature is not
installed)
Privileged operation
Access (store, operand 2)
Specification
Store Then AND System Mask
[SI]
AC 12 8,
o 8 16
Bits
operand location. Then the contents of bit positions
product (AND) of their original contents and the
second operand.
The operation is suppressed on protection and
addressing exceptions.
Condition Code: The code remains unchanged.
Operation (if the translation feature is not in
stalled)
Privileged operation
Programming Note
The
tion permits the program to turn off selected bits in
the system mask while retaining the original contents
for later restoration. For example, in EC mode it
System-Control Instructions 113