Programming Note
In the execution of MVO, the fetch and subsequent
store aecesses to the low-order byte of the first oper-'
and do not necessarily occur one immediately after
the other.
Move Zones L B, o 8 16 20 32 36 47
The high-order four bits of each byte in the second­ operand field (the zones) are placed in the high­ order four bit positions of the corresponding bytes in
the first-operand field. The low-order four bits of
each byte in the first-operand field remain un­ changed.
Each operand field is processed left to right.
When the operands overlap, the result is obtained as
if the operands were processed one byte at a time
and each result byte were stored immediately after
the necessary operand byte is fetched. Condition Code:
The code remains unchanged.
Program Exceptions:
Access (fetch, operand 2; fetch and store, oper­ and 1)
Programming Note
The execution of MVZ consists in fetching the high­ order four bits of each byte in the first-operand
field, and subsequently storing the updated value of
the byte. These fetch and store accesses to a particu­ lar byte do not necessarily occur one immediately
after the other.
MUltiply
MR Rl,R2 [RR]
136 System/370 Principles of Operation The product of the multiplier (the second operand)
and the multiplicand (the first operand) replaces the
mUltiplicand.
Both mUltiplier and multiplicand are 32-bit signed
integers. The product is always a 64-bit signed inte­ ger and occupies an even-odd register pair. Because
the multiplicand is replaced by the product, the R 1
field of the instruction must refer to an even­ numbered register. A specification exception occurs
when R
1 is odd. The multiplicand is taken from the
odd register of the pair. The contents of the even­ numbered register replaced by the product are ig­ nored, unless the register contains the multiplier. An
overflow cannot occur.
The sign of the product is determined by the rules
of algebra from the multiplier and multiplicand sign,
except that a zero result is always positive.
Condition Code:
The code remains unchanged.
Program Exceptions:
Access (fetch, operand 2 of M only)
Specification
Programming Note
The significant part of the product usually occupies
62 bits or fewer. Only when two maximum negative
numbers are multiplied are 63 significant product
bits formed. Since two's-complement notation is
used, the sign bit is extended right until the first sig­ nificant product digit is encountered.
Multiply Hal/word
MH Rl,D2(X2,B2) [RX]
4C
o 8 12 16 20 31
The product of the multiplier (second operand) and
multiplicand (first operand) replaces the multipli­ cand. The second operand is two bytes in length and
is considered to be a 16-bit signed integer.
Both multiplicand and product are 32-bit signed
integers and may be located in any general register.
The 16-bit multiplier is expanded to 32 bits before
multiplication by propagating the sign-bit value
through the 16 high-order bit positions. The multipli­
cand is replaced by the low-order part of the prod­
uct. The bits to the left of the 32 low-order bits are
not tested for significance; no overflow indication is
given.

The sign of the product is determined by the rules
of algebra from the multiplier and multiplicand sign,
except that a zero result is always positive.
Condition Code:
The code remains unchanged.
Program Exceptions:
Access (fetch, operand 2)
Programming Note
The significant part of the product usually occupies
46 bits or fewer, the exception being 47 bits when
both operands are maximum negative. Since the
low-order 32 bits of the product are stored un­
changed, ignoring all bits to the left, the sign bit of
the result may differ from the true sign of the prod­
uct in the case of overflow. OR OR Rl,R2 [RR]
16 I R, I R2 I 0 8 12 15 0 Rl,D2(X2,B2) [RX]
56 I R, I X
2 I 8
2 D2 0 8 12 16 20 31 01 Dl (Bl),h [81]
96 8
1
o 8 16 20 31
D6 I L
o 8
The OR of the first and second operands is placed in
the first-operand location. Operands are treated as unstructured logical
quantities, and the connective OR is applied bit by
bit. A bit position in the result is set to one if the
corresponding bit position in one or both operands
contains a one; otherwise, the result bit is set to
zero.
For OC, each operand field is processed left to
right. When the operands overlap, the result is ob-
tained as if the operands were processed one byte at
a time and each result byte were stored immediately
after the operand byte is fetched.
Resulting Condition Code:
o Result is zero
1 Result not zero
2 -
3 -
Program Exceptions:
Access (fetch, operand 2,0 and OC; fetch and
store, operand 1, 01 and OC) Programming Note
The instruction OR may be used to set a bit to one.
The execution of 01 and OC consists in fetching a
first-operand byte from main storage and subse­
quently storing the updated value. These fetch and
store accesses to a particular byte do not necessarily
occur one immediately after the other. Thus, the
instruction OR cannot be safely used to update a
shared location in main storage if the possibility ex­
ists that another CPU may also be updating the loca­
tion. For 01, only one byte is stored.
Pack
PACK [88] I 36 47 I o
F2
The format of the second operand is changed from
zoned to packed, and the result is placed in the first­
operand location.
The second operand is assumed to have the zoned
format. All zones are ignored, except the zone over
the low-order digit, which is assumed to represent a
sign. The sign is placed in the right four bits of the
low-order byte, and the digits are placed adjacent to
the sign and to each other in the remainder of the
result field. The sign and digits are moved un­
changed to the first operand field and are not
checked for valid codes.
The result is obtained as if the fields were pro­
cessed right to left. If necessary, the second operand
is extended with high-order zeros. If the first­
operand field is too short to contain all significant
digits of the second-operand field, the remaining
high-order digits are ignored.
General Instructions 13 7