codes is interpreted as sign codes, with 1010, 1100, 1110, and 1111 recognized as plus and with 1011 and 1101 recognized as minus. The codes 0000-1001 are
invalid as sign codes. The zones are not tested for
valid codes as they are eliminated in changing data
from the zoned to the packed format.
The sign and zone codes generated for all decimal
arithmetic results differ for the extended binary-coded­
decimal interchange code (EBCDIC) and the American
Standard code for information interchange ( ASCII) .
The choice between the two codes is determined by
bit 12 of the psw. When bit 12 is zero, the preferred
EBCDIC codes are generated; these are plus, 1100; minus, 1101; and zone, 1111. When bit 12 is one, the
preferred ASCII codes are generated; these are plus, 1010; minus, 1011; and zone, 0101. Condition Code
The results of all add-type and comparison operations
are used to set the condition code. All other decimal
arithmetic operations leave the code unchanged. The
condition code can be used for deciSion-making by
subsequent branch-on-condition instructions.
The condition code can be set to reflect two types
of results for decimal arithmetic. For most operations
the states 0, 1, and 2 indicate a zero, less than zero,
and greater than zero content of the result field; the
state 3 is used when the result of the operations over­
flows.
For the comparison operation, the states 0, 1, and 2
indicate that the first operand compared equal, low,
or high.
CONDITION CODE SETTING FOR DECIMAL ARITHMETIC 0 1 2 3
Add Decimal zero < zero > zero overflow Compare Decimal equal low high
Subtract Decimal zero < zero > zero overflow
Zero and Add zero < zero > zero overflow
Instruction Format
Decimal instructions use the following format: 55 Format Op Code B1 I D1 I B2 7 8 11 12 1516 1920 31 32 35 36 47
For this format, the contents of the general register
specified by Bl is added to the content of the Dl field
to form an address. This address specifies the leftmost
byte of the first operand field. The number of operand
bytes to the right of this byte is specified by the Ll
field of the instruction. Therefore, the length in bytes
of the first operand field is 1-16, corresponding to a
length code in Ll of 0000-1111. The second operand
field is specified similarly by the L1, B2, and D2 in­
struction fields.
A zero in the Bl or B2 field indicates the absence of
the corresponding address component.
Results of operations are always placed in the first
operand field. The result is never stored outside the
field specified by the address and length. In the event
the first operand is longer than the second, the second
operand is extended with high-order zeros up to the
length of the first operand. Such extension never modi­
fies storage. The second operand field and the con­
tents of all general registers remain unchanged.
Instructions
The decimal arithmetic instructions and their mne­
monics and operation codes follow. All instructions
use the ss format and assume packed operands and
results. The only exceptions are PACK, which has a
zoned operand, and UNPACK, which has a zoned result.
The table indicates the feature to which each instruc­
tion belongs, when the condition code is set, and the
exception that causes a program interruption.
NAME MNEMONIC
Add Decimal AP Subtract Decimal SP Zero and Add ZAP Compare Decimal CP Multiply Decimal MP Divide Decimal DP Pack PACK Unpack UNPK Move with Offset MVO NOTES Addressing exception Condition code is set
TYPE SS T,C SS T,C SS T,C SS T,C SS T SS T SS SS SS A C D
DF
DK P S T
Data exception
Decimal-overflow exception
Decimal-divide exception
Protection exception
Specification exception
Decimal feature
Programming Note
EXCEPTIONS CODE P,A, D,DF FA P,A, D,DF FB P,A, D,DF F8
A, D F9 P,A,S,D FC P,A,S,D,DK FD P,A F2 P,A F3 P,A Fl
The moving, editing, and logical comparing instruc­
tions may also be used in decimal calculations.
Add Decimal AP 55 FA B1 I D1 1 B2 IJ[5] 7 8 11 12 1516 1920 31 32 35 36 47
The second operand is added to the first operand, and
the sum is placed in the first operand location.
Decimal Arithmetic 35

Addition is algebraic, taking into account sign and
all digits of both operands. All signs and digits are
checked for validity. If necessary, high-order zeros are
supplied for either operand. When the first operand
field is too short to contain all significant digits of the
sum, a decimal overflow occurs, and a program inter­
ruption is taken provided that the corresponding mask
bit is one. Overflow has two possible causes. The first is the
loss of a carry out of the high-order digit position of
the result field. The second cause is an oversized re­
sult, which occurs when the second operand field is
larger than the first operand field and significant result
digits are lost. The field sizes alone are not an indi­
cation of overflow.
The first and second operand fields may overlap
when their low-order bytes coincide; therefore, it is
possible to add a number to itself.
The sign of the result is determined by the rules of
algebra. A zero sum is always positive. When high­
order digits are lost because of overflow, a zero result
has the sign of the correct sum.
Resulting Condition Code:
o Sum is zero
1 Sum is less than zero
2 Sum is greater than zero
3 Overflow Program Interruptions: Operation (if decimal feature is not installed)
Protection
Addressing
Data Overflow Subtract [»ecimal 5P 55
FB
78 11 12 1516
The second operand is subtracted from the first oper­
and, and the difference is placed in the first operand
location.
Subtraction is algebraic, taking into account sign
and all digits of both operands. The SUBTRACf DECIMAL
is similar to ADD DECIMAL, except that the sign of the
second operand is changed from positive to negative
or from negative to positive after the operand is ob­
tained from storage and before the arithmetic.
The sign of the result is determined by the rules of
algebra. A zero difference is always positive. When
36
high-order digits are lost because of overflow, a zero
result has the sign of the correct difference. Resulting. Condition Code:
o Difference is zero
1 Difference is less than zero
2 Difference is greater than zero
3 Overflow Program Interruptions: Operation (if decimal feature is not installed)
Protection
Addressing
Data
Decimal overflow
Programming Note
The operands of SUBTRACT DECIMAL may overlap when
their low-order bytes coincide, even when their
lengths are unequal. This property may be used to set
to zero an entire field or the low-order part of a ReId. Zero and Add ZAP 55 F8
78 11 12 1516
The second operand is placed in the first operand lo­
cation.
The operation is equivalent to an addition to zero.
A zero result is positive. When high-order digits are
lost because of overflow, a zero result has the sign of
the second operand. Only the second operand is checked for valid sign
and digit codes. Extra high-order zeros are supplied
if needed. When the Rrst operand Reld is too short to
contain all significant digits of the second operand, a
decimal overflow occurs and results in a program in­
terruption, provided that the decimal overflow mask
bit is one. The Rrst and second operand fields may
overlap when the rightmost byte of the first operand
field is coincident with or to the right of the rightmost
byte of the second operand.
Resulting Condition Code:
o Result is zero
1 Result is less than zero
2 Result is greater than zero
3 Overflow Program Interruptions: Operation (if decimal feature is not installed)
Addressing
Data
Decimal overflow
Protection