Exclusive OR XR RR I 17 R1 R2 0 78 11 12 15
X RX I 57 R1
X
2
B2 D2 0 7 8 11 12 1516 1920 31 XI 51 97
7 8 1516 1920 31
XC 55 D7 L
B1 I B2 78 1516 1920 31 32 35 36 47
The modulo-two sum (exclusive OR) of the bits of the
first and second operand is placed in the first operand
location. Operands are treated as instructured logical quanti­
ties, and the connective exclusive OR is applied bit by
bit. All operands and results are valid.
The instruction differs from AND and OR only in the
connective applied.
Resulting Condition Code:
o Result is zero
1 Result not zero
2
3
Program Interruptions:
Protection (XI, XC only)
Addressing (x, XI, xc only)
Specification (x only)
Programming Note
The exclusive OR may be used to invert a bit.
Test Under Mask
TM 51 91
78 1516 1920 31
The state of the first operand bits selected by a mask
is used to set the condition code.
The byte of immediate data, 12, is used as an eight­
bit mask. The bits of the mask are made to correspond
one for one with the bits of the character in storage
specified by the first operand address.
A mask bit of one indicates that the storage bit is
selected. When the mask bit is zero, the storage bit is
ignored. When all storage bits thus selected are zero,
the condition code is made O. The code is also made
o when the mask is all-zero. When the selected bits
are all-one, the code is made 3; otherwise, the code is
made 1. The character in storage is not changed.
Resulting Condition Code:
o Selected bits all-zero; mask is all-zero
1 Selected bits mixed zero and one
2
3 Selected bits all-one
Program Interruptions:
Addressing. Insert Character IC RX
43
7 8 11 12 15 16 19 20 31
The eight-bit character at the second operand address
is inserted into bit positions 24-31 of the register spe­
cified as the first operand location. The remaining bits
of the register remain unchanged.
The instruction is storage to general register. The
byte to be inserted is not changed or inspected.
Condition Code: The code remains unchanged.
Program Interruptions: Addressing.
Store Character 5TC RX
42
7 8 11 12 15 16 19 20 31
Bit positions 24-31 of the register designated as the
first operand are placed at the second operand ad­
dress.
The instruction is general register to storage. The
byte to be stored is not changed or inspected.
Condition Code: The code remains unchanged.
Program Interruptions:
Protection
Addressing
Logical Operations 55
Load Address
LA RX 41
7 8 11 12 15 16 19 20 31
The address of the second operand is inserted in the
low-order 24 bits of the general register specified by R i The remaining bits of the general register are
made zero. No storage references for operands take
place.
The address specified by the X2, B2, and D2 fields is
inserted in bits 8-31 of the general register specified
by R i Bits 0-7 are set to zero. The address is not in­
spected for availability, protection, or resolution.
The address computation follows the rules for ad­
dress arithmetic. Any carries beyond the 24th bit are
ignored.
Condition Code: The code remains unchanged. Program Interruptions: None.
Programming Note
The same general register may be specified by the Rb X 2 , and H2 instruction field, except that general regis­
ter 0 can be specified only by the Ri field. In this
manner, it is possible to increment the low-order 24
bits of 2l general register, other than 0, by the con­
tents of the D2 field of the instruction. The register
to be incremented should be specified by Ri and by
either X 2 (with B2 set to zero) or B2 (with X2 set to
zero ). Translah! TR S5 DC L
B1 I B2 IU3J 78 15 16 19 20 31 32 35 36 . 47
The eight-bit bytes of the first operand are used as
arguments to reference the list designated by the sec­
ond operand address. Each eight-bit function byte se­
lected from the list replaces the corresponding argu­
ment in the first operand.
The bytes of the first operand are selected one by
one for translation, proceeding left to right. Each
argument byte is added to the entire initial address,
the second operand address, in the low-order bit po­
sitions. The sum is used as the address of the function
byte, which then replaces the original argument byte.
All data are valid. The operation proceeds until the
first operand field is exhausted. The list is not altered
unless an overlap occurs.
56
Condition Code: The code remains unchanged. Program Interruptions:
Protection
Addressing
Translate and Test
TRT 55 DD
7 8
L
B1 I B2 1516 1920 3132 3536 47
The eight-bit bytes of the first operand are used as
arguments to reference the list designated by the sec­
ond' operand address. Each eight-bit function byte
thus selected from the list is used to determine the
continuation of the operation. vVhen the function byte
is a zero, the operation proceeds by fetching and
translating the next argument byte. When the function
byte is nonzero, the operation is completed by insert­
ing the related argument address in general register
1, and by inserting the function byte in general regis­
ter 2.
The bytes of the first operand are selected one by
one for translation, proceeding from left to right. The
first operand remains unchanged in storage. Fetching
of the function byte from the list is performed as in
TRANSLATE. The function byte retrieved from the list
is inspected for the all-zero combination.
When the function byte is zero, the operation pro­
ceeds with the next operand byte. When the first op­
erand field is exhausted before a nonzero function byte
is encountered, the operation is completed by setting
the condition code to O. The contents of general regis­
ter 1 and 2 remain unchanged.
When the function byte is nonzero, the related ar­
gument address is inserted in the low-order 24 bits of
general register 1. This address points to the argument
last translated. The high-order eight bits of register 1
remain unchanged. The function byte is inserted in
the low-order eight bits of general register 2. Bits 0-23 of rcgister 2 remain unchanged. The condition code
is set to 1 when the one or more argument bytes have
not been translated. The condition code is set to 2 if
the last function byte is nonzero.
Resulting Condition Code:
o All function bytes are zero
1 Nonzero function byte before the first operand
field is exhausted
2 Last function byte is nonzero
3 Program Interruptions:
Addressing
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