base or index registers, from which the address is
generated. The use of the prefix applies both to ad
dresses obtained from the program(CPU or I/O), and
to fixed addresses generated by theCPU for updating
or interruption purposes.
Both main prefix and alternate prefix occupy 12
bits.One or the other replaces the 12 high-order ad
dress bits when these are found to be zero.
The choice of main or alternate prefix is determined
by the prefix trigger. This trigger is set during initial
program loading(IPL) and remains unchanged until
the next initial program loading occurs. ManualIPL sets the prefix trigger to the state of the prefix-select
switch on the operator. control section of the system
control panel. ElectronicIPL sets the prefix trigger to
the state indicated by the signal line used. The state
of the prefix is indicated by the alternate-prefix light
on the operator intervention section of the system con
trol panel.
The prefixes can be changed by hand within 5 min
utes from one prewired encoding to another. The low
order four bits of a prefix always have even parity,
and the total number of one-bits in a prefix cannot
exceed seven.
MalfunctionIndication A machine check out-signal occurs whenever a ma
chine check is recognized and the machine-check mask
bit is one. The signal has D.5-microsecond tol.O-micro second duration and is identical in electronic charac
teristics to the signals on the signal-out lines of the
direct control feature.
The machine check out-signal is given during ma
chine-check handling and has a high probability of
being issued in the presence of machine malfunction.System Initialization A main IPL in-line and an alternate IPL in-line respond
to O.5-microsecond to 1.0-microsecond pulses. Either
line, when pulsed, sets the prefix trigger to the state
indicated by its name and subsequently starts initial
program loading. Thus, these lines permit electronic
initiation ofIPL. The definition of the signal to which these lines re
spond is identical in electronic characteristic to the
definition for the signal-in lines of the external inter
ruption.
Instruction format
Status-switching instructions use the following two
formats:
RR FormatI Op Code Rl R2 I 0 78 11 12 15
51 FormatOp Code 12 Bl Dl
78 15161920 31
In the RR format, the Rl field specifies a general reg
ister, except forSUPERVISOR CALL. The R2 field speci
fies a general register inSET STORAGE KEY and INSERT STORAGE KEY. The Rl and R2 fields in SUPERVISOR CALL
contain an identification code. InSET PROGRAM MASK the R2 field is ignored.
In theSI format the eight-bit immediate field (12)
of the instruction contains an identification code. Theh field is ignored in LOAD psw and SET SYSTEM MASK. The content of the general register specified by Bl is
added to the content of the Dl field to form an address
designating the location of an operand in storage.Only one operand location is required in status-switch
ing operations.
A zero in the Bl field indicates the absence of the
corresponding address component.
Instructions
The status-switching instructions and their mnemonics,
formats, and operation codes follow. The table also
indicates the feature to which an instruction belongs
and the exceptions that cause a program interruption.
NAMEMNEMONIC TYPE EXCEPTIONS CODE Load PSW LPSW SI L M, A,S 82 Set Program Mask SPM RR L 04 Set System Mask SSM SI M, A 80 Supervisor Call SVC RR OA Set Storage Key SSK RR Z M, A,S 08 Insert Storage Key ISK RR Z M, A,S 09 Write Direct WRD SI Y M, A 84
Read Direct RDDSI Y M,P,A 85
DiagnoseSI M, A,S 83 NOTES A Addressing exception
L New condition codc loaded
M Privileged-operation exceptionP Protection exception S Specification exception
Y Direct control featureZ Protection feature
Programming Note
The program status is also switched by interruptions,
initial program loading, and manual control.Status Switching 71
generated. The use of the prefix applies both to ad
dresses obtained from the program
to fixed addresses generated by the
or interruption purposes.
Both main prefix and alternate prefix occupy 12
bits.
dress bits when these are found to be zero.
The choice of main or alternate prefix is determined
by the prefix trigger. This trigger is set during initial
program loading
the next initial program loading occurs. Manual
switch on the operator. control section of the system
control panel. Electronic
the state indicated by the signal line used. The state
of the prefix is indicated by the alternate-prefix light
on the operator intervention section of the system con
trol panel.
The prefixes can be changed by hand within 5 min
utes from one prewired encoding to another. The low
order four bits of a prefix always have even parity,
and the total number of one-bits in a prefix cannot
exceed seven.
Malfunction
chine check is recognized and the machine-check mask
bit is one. The signal has D.5-microsecond to
teristics to the signals on the signal-out lines of the
direct control feature.
The machine check out-signal is given during ma
chine-check handling and has a high probability of
being issued in the presence of machine malfunction.
to O.5-microsecond to 1.0-microsecond pulses. Either
line, when pulsed, sets the prefix trigger to the state
indicated by its name and subsequently starts initial
program loading. Thus, these lines permit electronic
initiation of
spond is identical in electronic characteristic to the
definition for the signal-in lines of the external inter
ruption.
Instruction format
Status-switching instructions use the following two
formats:
RR Format
51 Format
78 1516
In the RR format, the Rl field specifies a general reg
ister, except for
fies a general register in
contain an identification code. In
In the
of the instruction contains an identification code. The
added to the content of the Dl field to form an address
designating the location of an operand in storage.
ing operations.
A zero in the Bl field indicates the absence of the
corresponding address component.
Instructions
The status-switching instructions and their mnemonics,
formats, and operation codes follow. The table also
indicates the feature to which an instruction belongs
and the exceptions that cause a program interruption.
NAME
Read Direct RDD
Diagnose
L New condition codc loaded
M Privileged-operation exception
Y Direct control feature
Programming Note
The program status is also switched by interruptions,
initial program loading, and manual control.