If an addressing condition is encountered in
accessing any field outside the storage of the virtual
machine during execution of any of the assist
functions, the following action is ________ _ not specified that a store
access has been made when the condition is
encountered, the execution of the assist ends
with an interruption. For any instructions
assisted, a program interruption takes place,
and instruction execution is suppressed; it is
unpredictable whether a privileged-operation or
an addressing exception is indicated. For the
shadow-table-validation function or the page­
fault-reflection function, a program interruption
takes place, and it is unpredictable whether a
page-translation exception or an addressing
exception is indicated. For the supervisor-call
function, it is unpredictable whether an
interruption takes place or a program
interruption takes place with an addressing
exception indicated.
2. If a store access has been made before the
addressing condition is encountered, a program
interruption for an addressing exception is
taken, and instruction execution is terminated.
The detailed descriptions of assist functions do
not explicitly mention addressing conditions that
may occur when an invalid address is assigned to
the workspace. This address is found in
MICWORK, word 3 of the parameter list.
References to the workspace are model-dependent.
The interruptions resulting from addressing
conditions in accessing the workspace are in
addition to those enumerated in the detailed
descriptions of assist functions.
Method of Detailed Description
Chapter 2 contains a detailed description of each
virtual-machine-assist function. Chapter 4 contains
a __ shadow-table-bypass assist. Function execution is
broken down into steps. An alphameric
designation, the priority indicator, appears in
parentheses at the end of each step.
Most steps state the conditions under which
execution of the function ends with that step. If
the conditions for ending execution are met for two
or more steps, execution ends with the step having
the highest priority. The relative priority of two
steps is determined by comparing the numbers and
letters of the priority indicators of those two steps
from left to right to find the first differing position.
When the first differing position contains a
number, the step whose priority indicator has the
lower number has the higher priority. When the
first differing position contains a letter, both steps
are of equal priority.
When two or more steps having the same priority have their ending conditions satisfied, it is
unpredictable with which of those steps execution
of the function will actually end.
At the end of the detailed description of each
assist function is a summary showing each field of
each control block in storage that is accessed. The
offset shown is the offset to be applied to the
address by which that control block was located.
In general, this is the same as the offset within the
control block. However, the field, VMPSW, is
located at offset A8 hex within the VMBLOK. The offset is shown as zero because that field is
directly located by the contents of MICVPSW without the application of any additional offset.
Assists for 70 7
Chapter 2. Virtual-Machine Assist
The virtual-machine assist (VMA) is the basic
assist for VM/370. The virtual-machine assist
improves the performance oTvirtuaTmacnmes-­ executing under VM/370 by directly executing 12
instructions for virtual machines which would
otherwise be simulated by VM/370. The virtual­
machine assist also directly validates the
appropriate page-table entry of the shadow tables
when a page-translation condition is encountered in
executing a virtual-machine program and when the
corresponding virtual and real page-table entries
are both valid.
Figure 4 shows the virtual-machine instructions
that can be directly executed using the virtual­
machine assist, as well as the settings of bits in
control register 6 required for . assisting each
function. An X indicates that the value may be
either zero or one.
Function I nser t PSW key I I nsert storage key
Load PSW real address I Reset reference bit I
,
Set PSW key from address Set storage key I Set system mask
. Store contro 1
Store then AND system mask
Store then OR system mask
Supervisor call
Shadow-table val idation Bits 0-5 of Control Register 6 10XO XX 100X XX 10XX XX 10XO XX 10XO XX 10XO XX 100X XX 10XX XX 10XO XX 10XO XX 10XO XX
lXXX OX lXXX Xl Figure 4. Controls for Activating VMA Functions
Programming Notes
1. Bit 3 of control register 6 is normally set to
zero for a System/370 virtual machine and to
one for a System/360 virtual machine. In this
way, System/370 instructions encountered in a System/360 virtual-machine program cause a
program interruption to take place for a
privileged-operation exception.
2. Bit 5 of control register 6 is normally set to
zero for a virtual machine in BC mode or in EC
mode with DA T off. It is set to one when
shadow translation tables are in use, that is,
when the virtual machine is in EC mode and
DAT is on. However, shadow tables may be
avoided for a virtual machine with the
virtual = real option in VM/3 70 and the vfrluaTtfaifs1atTonfiib1es used 3. A one in bit position 2 of control register 6
inhibits the virtual execution of INSERT STORAGE KEY and SET STORAGE KEY.
Similarly, a one in bit position 4 of control
register 6 inhibits the virtual execution of SUPERVISOR CALL.
INSERT PSW KEY./
The INSERT PSW KEY instruction is executed for
a virtual machine if the virtual-machine assist is
activated for System/370 instructions, unless (1) a
virtual-machine exception is recognized or (2) the
virtual PSW cannot be fetched.
The insert-PSW .. key function of the virtual­
machine assist is invoked each time a CPU attempts
to execute an INSERT PSW KEY instruction when
the problem-state bit of the real PSW is one.
Execution of this function consists in performing
the following steps:
1. If bits 0-3 of control register 6 are not 10XO binary, execution of the insert-PSW-key
function ends, a program interruption takes
place for a privileged-operation exception, and
execution of the INSERT PSW KEY instruction
is suppressed (I.A.l).
2. The word MICVPSW, which contains the
address of the virtual PSW, is fetched with a
key of zero. Execution ends if an addressing
condition is encountered (1.A.2).
3. VMPSW, the virtual PSW, is fetched with a key
of zero. Execution ends if an addressing
condition is encountered (1.A. 3).
4. If an access exception is encountered in
fetching the second halfword of the INSERT PSW KEY instruction, it is unpredictable
whether this condition is ignored because no
information is needed from that halfword to
execute the instruction. If an access condition
is encountered and is not ignored, execution of
this function ends, and a program interruption
takes place for that access exception (l.B).
5. The four-bit protection key of the virtual PSW is placed in bit positions 24-27 of general
register 2. Bits 0-23 of general register 2
remain unchanged, and bits 28-31 are set to
zeros (2).
Figure 5 summarizes the fields used.
Virtual-Machine Assist 9
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