interruption takes place for a privileged­
operation exception (1. B. 1 ).
6. If an access exception exists for a store access
made with the PSW key to the location
designated by the first-operand address,
execution of this function ends, and a program
interruption is taken for the access exception
found (1.B.2).
7. The old value of byte 0 of the virtual PSW is
stored at the first-operand logical address. The
updated virtual PSW is stored as the new
virtual PSW with a key of zero (2).
Execution of this function ends with completion
of the STORE THEN AND SYSTEM MASK
instruction.
Figure 17 summarizes the fields used. STORE THEN OR SYSTEM MASK The STORE THEN OR SYSTEM MASK
instruction is executed for a virtual machine if the
virtual-machine assist is activated for System/370
instructions, unless (1) a virtual-machine
interruption may follow, (2) the first operand or
some pertinent VM/370 control field cannot be
accessed, or (3) the PER mask or the DAT bit of
the virtual PSW would be changed.
If the shadow-table-bypass assist is not installed,
the store-then-OR-system-mask function of the
virtual-machine assist is invoked each time a CPU attempts to execute a STORE THEN OR SYSTEM
MASK instruction when the problem-state bit of
the real PSW is one. If the shadow-table-bypass
assist is installed, the store-then-OR-system-mask
function of the virtual-machine assist may be . invoked only from the STOSM function of the
shadow-table-bypass assist. Execution of this
function consists in performing the following steps:
1. If bits 0-3 of control register 6 are not 10XO binary, execution of this function ends, a
program interruption takes place for a
privileged-operation exception, and execution
of the STORE THEN OR SYSTEM MASK
instruction is suppressed (l.A.l).
Field Control Address Offset No. of
2. The word MICVPSW, which contains the
address of the virtual PSW, is fetched with a
key of zero. Execution ends if an addressing
condition is encountered (l.A.2).
3. The first halfword of VMPSW, which contains
the virtual PSW, is fetched with a key of zero.
Execution ends if an addressing condition is
encountered (l.A.3).
4. A new first byte for the virtual PSW is
computed by taking the logical OR of the
immediate field (12) of the instruction and byte
o of the virtual PSW fetched. If the virtual PSW is in the EC mode (bit 12 is one) and if
the replacement of byte 0 of the virtual PSW by the new byte 0 would change any of the bits
in bit positions 0-5 from zero to one, execution
of this function ends. Execution also ends if
bit 0 of MICVPSW is one and if the
replacement of byte 0 of the virtual PSW by
the new PSW would change any bit from zero
to one. Ending of execution invokes the store­
then-OR-system-mask function of the expanded
virtual-machine assist if that assist is installed. Otherwise, ending of execution causes a
program interruption to be taken for a
privileged-operation exception (l.A. 4).
5. The second halfword of the instruction is
fetched. If an access condition is encountered,
execution of this function ends, and a program
interruption takes place for a privileged­
operation exception (1.B.O. 6. If an access exception exists for a store access
made with the PSW key to the location
designated by the first-operand logical address,
execution of this function ends, and a program
interruption takes place for the access
exception found (1.B.2).
7. The old value of byte 0 of the virtual PSW is
stored at the first-operand logical address. The
updated virtual PSW is stored with a key of
zero as the new virtual PSW. Execution of this
function ends with the completion of the STORE THEN OR SYSTEM MASK instruction
(2).
Figure 18 summarizes the fields used.
Name Block Type (Hex) Bytes Contents MICVPSW MICBLOK Real 8 4 Address of VMPSW VMPSW VMBLOK Real 0 2 Virtual PSW bits 0-15 Operand 1 -Logical -1 Old system mask
Figure 17. Fields Used in STORE THEN AND SYSTEM MASK
22 Virtual-Machine Assist and Shadow-Table-Bypass Assist

Control Address Offset No. of fFlel d
Name Block Type (Hex) Bytes Contents MICVPSW _ I ___ 1 8 -\ 4 iAddress of VMPSW 0-151 - ---
-- - - --- -- - - -- ---t-- ---- VMPSW IVMRI nK 1<0.::>1 0 2 iVlrtual PSW bits I Operand 21 - I 1 IOld system mask I Figure 18. Fields Used in STORE THEN OR SYSTEM MASK SUPERVISOR CALL
The SUPERVISOR CALL instruction is executed
for a virtual machine if the virtual-machine assist is
activated for SVC interruptions, unless (1) a
virtual-machine interruption may follow; (2) some
pertinent VM/370 control field or the low-storage
locations of the virtual machine cannot be
accessed; (3) the PER mask is one in the real PSW or in the old or the new virtual PSW; (4) execution
would change the control mode, the DAT bit, or
the wait-state bit of the virtual PSW; or (5) the SVC interruption code is 76 hex. The supervisor-call function of the virtual­
machine assist is invoked each time a CPU attempts
to execute a SUPERVISOR CALL instruction
when the problem -state bit of the real PSW is one.
Execution of this function consists in performing
the following steps:
1. If bits 0-4 of control register 6 are not lXXXO binary, execution of the supervisor-call function
ends, and a supervisor-call interruption takes
place in the real machine in the normal
manner (1).
2. If the real PSW is in EC mode with the PER mask set to one, execution ends, and a real
supervisor-call interruption takes place (2.A).
3. The word MICVPSW, which contains the
address of the virtual PSW, is fetched with a
key of zero. Execution ends if an addressing
condition is encountered (2.B.1).
4. VMPSW, which contains the current virtual PSW, is fetched with a key of zero. Execution
ends if an addressing condition is encountered
(2.B.2).
5. If the current virtual PSW is in EC mode with
the PER mask set to one, execution ends, and a
real supervisor-call interruption takes place (2,B,3), The virtual machine's real address 0 is
translated through the segment tables addressed
by the first word in the virtual-machine­
parameter list. The page-table entry is
interpreted in the format of a 4K-byte or
2K-byte page-table entry, depending on
whether bit 30 of MICRSEG is zero or one,
respectively. If any of the following conditions
is encountered, a real supervisor-call
interruption takes place:
6. An addressing condition is encountered in
fetching MICRSEG, which contains the address
of the real segment table, with a key of zero
(2.C.l).
7. An addressing condition is encountered in
fetching SEGPAGE, which contains the first
real-segment table entry, with a key of zero
8. The segment-table entry is invalid (2.C.3).
9. The segment-table entry has an invalid format
(2.C.4). 10. An addressing condition is encountered in
fetching P AGCORE, which contains the first
page-table entry of the first segment, with a
key of zero (2.C.5).
11. The page-table entry is invalid (2.C.6).
12. The page-table entry has an invalid format
(2.C.7).
13. The new virtual PSW is fetched, with a key of
zero, from location 60 hex in the first virtual
page. Execution ends if an addressing
condition is encountered (2.C.8).
14. If (1) the wait-state bit of the new virtual PSW is one or (2) that PSW is in the EC mode with
the PER mask set to one or with an invalid
format, execution ends, and a real supervisor­
call interruption takes place (2.C.9.A).
15. Execution of the supervisor-call function ends
if any of the following conditions holds
(2.C.9.B):
a. The control mode of the virtual PSW is
being changed from the BC to the EC
mode, or from the EC mode to the BC
mode.
b. The DAT mode bit of an EC-mode virtual PSW is being changed.
c. A virtual interruption is pending and any
channel mask, input/output mask, or
external mask is being changed from zero
to one (bits 0-7 in the BC mode and bits
6-7 in the EC mode). A virtual
interruption is pending when bit 0 of MICVPSW is one.
Virtual-Machine Assist 23