Note: Because all the preceding conditions
involve the value [etched in step 4, the priority
of step 15 (2. C. 9.B) is necessarily lower than
that of step 4, regardless of the rules based on
priority indicators.
If execution ends, a real supervisor-call
interruption takes place.
16. If the supervisor-call interruption code is 76
(4C hex), execution ends, and a real
supervisor-call interruption takes place (2.D).
17. The old PSW and interruption code are stored,
with a key of zero, in 20 hex and 88 hex of
virtual page 0 as appropriate to the mode of the
Shadow-Table Validation
When the real page-table entry used for dynamic
address translation is invalid and the shadow­
table-validation function is active, the correct, valid
entry value derived from the virtual and real
translation tables is placed in that page-table entry.
However, this validation function is not performed
if any exception condition is found in fetching or
using the corresponding real or virtual translation­
table entries. current virtual PSW. The stored values are the
If the shadow-table-bypass assist is not installed,
the shadow-table-validation function of the
virtual-machine assist is invoked whenever a
program interruption is about to take place for a
page-translation condition encountered outside the
shadow-table-validation function itself. If the
shadow-table-bypass assist is installed, the
shadow-table-validation function may be invoked
only from the page-fault-reflection function of the
shadow-table-bypass assist. If this function
successfully validates the shadow-table page entry
which caused the page-translation condition,
instruction execution that was in progress is
resumed or restarted. Otherwise, a program
interruption takes place for the original page­
translation condition or, in some cases, for an
addressing condition encountered in performing the
shadow-table-validation function. The execution of ,J' ;,0-: current virtual PSW, ILC, and SVC-number values updated by the condition code, program
mask, and from the real.", PSW. 'The virtual PSW is stored as the .", ---aIiTeiit virtual PSW in real storagef1ne­ .;', .()' and I instruction-address parts of the new virtual
.' \ PSW replace the corresponding "" real The--problem'-state bit of the new vlrtuafpSW is placed in bit .. 9i...real control register function and"-a new virtual instruction is fetched
with the new real PSW (3).
Figure 19 summarizes the fields used.
Field Control Address Offset No. of
Name Block Type (Hex) Bytes Contents MICRSEG MICBLOK Real 0 4 Address of real
segment table MICVPSW MICBLOK Real 8 4 Address of VMPSW VMPSW VMBLOK Real 0 8 Virtual PSW SEGPAGE SEG Real 0 4 First real segment
TABLE table entry PAGCORE PAG Real 0 2 Address of PSA of
TABLE virtual machine
- PSA of Real' 20 8 Old SVC PSW virtual
Rea 11 -machine 60 8 New SVC PSW - Real
1
88 4 Interruption code
2
1 This real address is obtained by the address translation
performed in steps 6 through 12 without using control
registers 0 and 1.
2 This field is stored only when old SVC PSW is in EC mode.
Figure 19. Fields Used in SUPERVISOR CALL
24 Virtual-Machine Assist and Shadow-Table-Bypass Assist

this function consists in performing the following ste;ps: L On some models, the segment index and the \ ..pf- page index of the untranslatable address are tG 7.
entry address, execution of this function ends,
and a program interruption takes place for the
page-translation condition (2.A.S).
- pIaceolnlne· Wotd-aLreat-locatiurr9fi irer.-if ....7 bits 0-5 of control register 6 are not ,I binary or if the real PSWis in the EC mode
with a value of execution of this function ends, and a program interruption
takes place for the page-translation condition
(1).
2. The doubleword which contains the fields MICRSEG and MICCREG is fetched with a
key of zero. MICRSEGcontains the address of
the real segment table, and MICCREG contains
the address of the extended control block (ECBLOK). Execution ends if an· addressing
condition is encountered (2.A.O. 3. EXTeRO and EXTCR 1, virtual controi
registe:rs 0 and 1, are fetched from the ECBLOK with a key of zero. Execution ends
if an addressing condition is encountered
4.
(2.A.2).
If the translation format in bits 8-12 of virtual
control register 0 is invalid, execution of this
function ends, and a program interruption takes
place for the page-translation condition
(2.A.3).
5. Execution ends with a program interruption for
the page-translation condition if virtual control
register 0 specifies a 64K-byte segment size
and if the segment-table-length value in bit
positions 0-7 of virtual control register 1 is less
than the value obtained by appending four
zeros to the left of bits 8-11 of the
untranslatable address (2.A.4).
6. The untranslatable address is divided into a virtual-segment index, a virtual-page index, and
a virtual-byte index, based on the translation
format in virtual control register O. The
virtual-segment-table-entry address is computed
by using the contents of virtual control register
1 and the virtual segment index. The virtual­
segment-table-entry address is in turn divided
into a real-segment index, a real-page index,
and a real-byte index, assuming either 4K-byte
or 2K-byte pages, depending on whether bit 30 of MICRSEG is zero or one, and either
64K-byte or 1M-byte segments, depending on
whether bit 31 of MICRSEG is zero or one;
respectively. If bit 31 of MICRSEG is zero
and the real segment-table-length value in bit
positions 0-7 of MICRSEG is less than the
value obtained by appending four zeros to the
left of bits 8-11 of the virtual-segment-table-
Four times the real segment index found in step 6--is-added-te-th.e- address-- fetched in step 2 to obtain the address of the
real segment-table entry SEGP AGE for
translating the virtual segment-table-entry
address. This real segment-table entry is
fetched with a key of zero. Execution ends if
an addressing condition is encountered (2.A.6).
8. If the real segment-table entry is invalid or has
an invalid format, or if the value of the
leftmost four bits of the real page index of the
virtual segment-table entry address exceeds the
page-table length in bits 0-3 of the real
segment-table entry, execution of this function
ends, and a program interruption takes place
for the page-translation condition (2.A.7).
9. Twice the real page index found in step 6 is
added to the real page-table origin found in the
real segment-table entry fetched in step 7 to
obtain the address of the reai page-table entry PAGCORE for translating the virtual
segment-table-entry address. This real page­
table entry is fetched with a key of zero.
Execution ends if an addressing condition is
encountered (2.A.8). 10. If the real page-table entry is invalid or has an
invalid format, execution of this function ends,
and a program interruption takes place for the
page-translation condition (2.A.9).
11. The real byte index found in step 6 combined
with the page-frame real address found in the
real page-table entry fetched in step 9 obtain
the real address of the virtual segment-tabie
entry. The virtual segment-table entry is
fetched with a key of zero. Execution ends if
an addressing condition is encountered
(2.A.I0).
12. If the virtual segment-table entry is invalid or
has an invalid format, or if the value of the
leftmost four bits of the virtual page index of
the address that could not be translated exceeds
the page-table length in bits 0-3 of the virtual
segment-table entry, execution of this function
ends, and a program interruption takes place
for the page-translation condition (2.A.1I).
13. The virtual-page-table-entry address is
computed by using the contents of the virtual
segment-table entry and the virtual page index
of the untranslatable address. The virtual­
page-table-entry address is in turn divided into
a real segment index, a real page index, and a
real byte index assuming either 4K-byte pages
Virtual-Machine Assist 25