(bit 30 ofMICRSEG is zero) or 2K-byte pages
(bit 30 is one), and 64K-byte segments (bit 31
of MICRSEG is zero) or 1 M,·byte segments (bit
31 is one). If bit 30 of MICRSEG is zero and
the real segment-table-length value in bit
positions 0-7 of MICRSEG is less than the
value obtained by appending four zeros to the
left of bits 8-11 of the virtual-page-table-entry
address, execution of this function ends, and a
program interruption takes place for the page­
translation condition (2.A.12).
14. Four times the real segment index found in step
13 is added to the real segment-table address
fetched in step 2 to obtain the address of the
real segment-table entry for translating the
virtual page-table-entry address. This real
segment-table entry SEGPAGE is fetched with
a key of zero. Execution ends if an addressing
condition is encountered (2.A.13).
15. If the real segment-table entry is invalid or has
an invalid format. or if the value of the
leftmost four bits of the real page index of the
virtual page-table-entry address exceeds the
page-table length in bits 0-3 of the real
segment-table entry, execution of this function
ends, and a program interruption takes place
for the page-translation condition (2.A.14).
16. Twice the real page index found in step 13 is
added to the real page-table origin found in the
real segment-table entry fetched in step 14 to
obtain the address of the real page-table entry
for translating the virtual page-table-entry
address. This real page-table entry PAGCORE is fetched with a key of zero. Execution ends
if an addressing condition is encountered
(2.A.15).
17. If the real page-table entry fetched is invalid or
has an invalid format, execution of this
function ends. and a program interruption takes
place for the page-translation condition
(2.A.16).
18. The real byte index found in step 13 is
combined with the page-frame real address
found in the page-table entry fetched in step 16
to obtain the real address of the virtual page­
table entry. The virtual page-table entry is
fetched with a key of zero. Execution ends if
an addressing condition is encountered
(2.A. I 7).
19. If the virtual page-table entry is invalid or has
an invalid format, execution of this function
ends, and a program interruption takes place
for the page-translation condition (2.A.18). 20. The virtual address corresponding to the
address that could not be translated is
26 Virtual-Machine Assist and Shadow-TabIe-Bypass Assist
computed by using the contents of the virtual
page-table entry and the virtual.byte index of
the address that could not be translated. This
address is divided into a real segment index, a
real page index, and a real byte index, assuming
either 4K-byte pages (bit 30 of MICRSEG is
zero) or 2K -byte pages (bit 30 of MICRSEG is
one), and either 64K-byte segments (bit 31 of
MICRSEG is zero) or 1M-byte segments (bit
31 of MICRSEG is one). If bit .30 of
MICRSEG is zero and the real segment-table­
length value in bit positions 0-7 of MICRSEG
is less than the value obtained by appending
four zeros to the left of bits 8-11 of the virtual
address, execution of this function ends and a
program interruption takes place for the page­
translation condition (2.A.19).
21. Four times the real segment index found in step 20 is added to the real segment-table address
from MI CRSEG to obtain the address of the
real segment-table entry for translating the
virtual address. This real segment-table entry
SEGP AGE is fetched with a key of zero.
Execution ends if an addressing condition is
encountered (2.A.20). 22. If the real segment-table entry is invalid or has
an invalid format, or if the value of the
leftmost four bits of the page index of the
virtual address exceeds the page-table length in
bits 0-3 of the segment-table entry, execution
of this function ends, and a program
interruption takes place for the page-translation
condition (2.A.21).
23. Twice the real page index found in step 20 is
added to the real page-table origin found in the
real segment-table entry fetched in step 21 to
obtain the address of the real page-table entry
for translating the virtual address. This real
page-table entry P AGCORE is fetched with a
key of zero. Execution ends if an addressing
condition is encountered (2.A.22).
24. If the real page-table entry fetched is invalid or
has an invalid format, execution of this
function ends, and a program interruption takes
place for the page-translation condition
(2.A.23).
25. The address that could not originally be
translated because a page-translation condition
was encountered is divided into a a shadow­
table segment index, shadow-table page index,
and a shadow-table byte index based on the
translation format in bits 8-12 of real control
register O. The real address of the shadow
segment-table entry used for translating the
original address is computed by using the

shadow-table segment index and the shadow
segment-table address from real control register
1. The shadow segment-table entry SEGPAGE
is fetched with a key of zero. Execution ends if- an encountere4-----­ (2.B.1 ).
26. If the shadow entry is invalid or
has an invalid format, or if the value of the
leftmost four bits of the shadow-table page
index obtained in step 25 exceeds the value of
bits 0-3 of the shadow segment-table entry,
execution of this function ends, and a program
interruption takes place for the page-translation
condition (2.B.2).
27. Twice the shadow-table page index found in
step 25 is added to the page-table origin found
in the shadow segment-table entry fetched in
that step to compute the real address of the
shadow page-table entry PAGCORE to be
validated (3).
The real byte index found in step 20 combined
with the page-frame real address found in the
page-table entry fetched in step 23 to obtain the
real address corresponding to the address that
originally was untranslatable. A valid halfword
shadow-table entry is formed by placing bits 8-19
or 8-20 of the real address obtained by translation
in bit positions 0-11 or 0-12, depending on whether tlw- shadow --tahle--Page-sizeindicated-h¥l"eaLcontrol register 0 is 4K or 2K bytes, respectively, in size.
Zeros are placed in the remaining rightmost bit
positions. The valid shadow-table entry is stored
with a key of zero at the address computed at the
start of this step. Execution ends if an addressing
condition is encountered. Note that an addressing
condition cannot arise unless the shadow-table
segment-table entry was modified since the original
page-translation condition was found.
28. Execution of this function ends, and execution
of the noninterruptible instruction or the unit
of operation of the interruptible instruction
which was being executed when the original
page-translation condition was encountered is
resumed or restarted. On some models, any
pending I/O, external, or restart interruptions
may take place before an instruction is
executed (4).
Figure 20 summarizes the fields used.
Virtual-Machine Assist 27