instruction, execution of this function ends, and
a program interruption takes place for that access· exception (I.B). 9 .+M-firBt-b-yte- clthe-current virtuaLJ>£W_is stored, with the real PS\V key, at the location
specified by the first-operand effective (logical)
address. If an access exception is recognized, a
program interruption takes place with that
access condition indicated (2). 10. If bit S of the virtual PSW is zero, execution of
this function ends (3).
11. The virtual PSW, VMPSW, is updated in
storage with a key of zero to set bit S to zero
(4.A).
12. Bits 8-12 of reai control register 0 are set to 10000 binary. The real segment-table pointer,
MI CRSEG, is fetched with a key of zero and
placed in real control register 1. Execution of
the STORE THEN AND SYSTEM MASK instruction is terminated, and a program
interruption takes place if an addressing
exception is recognized (4.B.1).
13. The values of real control registers a and 1 are
stored with a key of zero in the doubleword (RUNCRO and RUNCR 1) at real address 340 hex (4.B.2).
Figure 27 summarizes the fields used. STORE THEN OR SYSTEM MASK
The STORE THEN OR SYSTEM MASK instruction is executed for a virtual machine if the
corresponding function of the shadow-table-bypass
assist is activated and if the instruction uses an 12
field value of 04 hex to turn on the DA T bit in the
virtual PSW. The store-then-OR-system-mask (STOSM) function of the shadow-tabIe-bypass assist is
Field Control Address Offset No. of
Name Block Type (Hex) Bytes Contents invoked each time a CPU attempts to execute a STORE THEN OR SYSTEM MASK instruction
when the problem-state bit of the rea! PSW is one. the following steps:
1. If bits 0-3 of control register 6 are not lOXO binary, a program interruption takes place for a
privileged-operation exception, and execution of the STOSM instruction is suppressed ( LA. 1).
2. M1CVPSW, which contains the address of the
virtual PSW, is fetched with a key of zero.
Execution ends if an addressing condition is
encountered (1.A.2).
3. Vrv1PS\V, the virtual PS\V is fetched with a key
of zero. Execution ends if an addressing
condition is encountered (l.A.3).
4. Execution of this function ends with a program
interruption for a privileged-operation
exception if bit 12 of VMPSW is zero. Ending
consists in invoking the STOSM function of the
virtual-machine assist if that assist is installed; otherwise, the STOSM function of the
expanded virtual-machine assist is invoked. If neither assist is installed, a program
interruption for a privileged-operation
exception takes place (l.A.4).
S. Execution of this function ends if the second
operand is not 04 hex. Ending consists in
invoking the STOSM function of the virtual­
machine assist if that assist is installed;
otherwise, the STOSM function of the
expanded virtual-machine assist is invoked. If
neither assist is installed, a program
interruption for a privileged-operation
exception takes place (l.A.S).
6. The assist control word, M1CACF, is fetched I MICRSEG MICBLOK I I Real 0 4 Real se ment 9 pointer
table IM,CVPSW I I
IMICACF VMPSW jRUNCRO I lRUNCRl Operand 1 IMICBLOKIReal I MICBLOK Real VMBLOK IpSA IpSA Real IReal I 'Real Logical
8 4
14 4 0 2 340 4
344 4
Address of VMPSW Assist control word Virtual PSW bits 0-15 jeontrOl register 0 atl I dispatch I atl Control register
dispatch
Figure 27. Fields Used in STORE THEN AND SYSTEM MASK
Shadow-Table-Bypass Assist 37

with a key of zero. Execution ends if an
addressing condition is encountered (l.A.6).
7. If bits 8 and 14 of the assist control word are
not both ones, execution of this function ends.
Ending consists in invoking the STOSM function of the virtual-machine assist if that
assist is installed; otherwise, the STOSM function of the expanded virtual-machine assist
is invoked. If neither assist is installed, a
program interruption for a privileged-operation
exception takes place (LA. 7).
8. If an access condition is encountered in
fetching the second halfword of the STOSM instruction, execution of this function ends, and
a program interruption takes place for the
access exception (1.B).
9. The first byte of the current virtual PSW is
stored, with the real PSW key, at the location
specified by the first-operand effective (logical)
address. If an access exception is recognized, a
program interruption takes place with that
access condition indicated (2). 10. If bit 5 of the current virtual PSW is one,
execution of this function ends (3).
11. The virtual PSW, VMPSW, is updated in
storage with a key of zero to set bit 5 to one
(4.A).
12. MICCREG, the word used to locate the shadow
control register values, is fetched with a key of
zero. Execution of the STORE THEN OR SYSTEM MASK instruction is terminated, and
a program interruption takes place if an
addressing exception is recognized (4.B.l).
Field Control Address Offset No. of
Name Block Type (Hex) Bytes Contents MICCREG MICBLOK Real 4 4 Address MICVPSW MICBLOK Real 8 4 Address
13. The values of shadow control registers 0 and 1
are fetched with a key of zero and loaded into
real control registers 0 and 1. Execution of the STORE THEN OR SYSTEM MASK instruction
is terminated, and a program interruption takes
place if an addressing exception is recognized
(4.B.2).
14. The values of real control registers 0 and 1 are
stored with a key of zero in the double word (RUNCRO and RUNCRl) at real address 340 hex (4.B.3).
Figure 28 summarizes the fields used.
TEST PROTECTION
The TEST PROTECTION instruction is executed
for a virtual machine with a virtual problem-state
bit of zero if the test-protection function of the
shadow-table-bypass assist is activated.
The test-protection (TPROT) function of the
shadow-table-bypass assist is invoked each time a CPU attempts to execute a TEST PROTECTION instruction when the problem-state bit of the real PSW is one. Execution of this function consists in
performing the following steps:
1. If bits 0-3 of control register 6 are not lOXO binary, a program interruption takes place for a
privileged-operation exception and execution of
the TPROT instruction is suppressed (l.A.t).
2. The assist control word, MICACF, is fetched
with a key of zero. Execution ends if an
addressing condition is encountered (1.A.2).
3. Execution ends with a program interruption for
a privileged-operation exception if bits 8 and
of ECBLOK of VMPSW MICACF MICBLOK Real 14 4 Assist control word EXTSHCRO ECBLOK Real 40 4 Shadow control reg-
ister 0 EXTSHCRl ECBLOK Real 44 4 Shadow control
register 1 VMPSW VMBLOK Real 0 2 Virtual PSW bits 0 ... 15 RUNCRO PSA Real 340 4 Control register 0 at
dispatch RUNCRl PSA Real 344 4 Control register 1 at
dispatch
Operand 1 -Logical -1 Old system mask
Figure 28. Fields Used in STORE THEN OR SYSTEM MASK 38 Virtual·Machine Assist and Shadow-Table-Bypass Assist