Inter- ruptions
. . T' upt-h-anrl+er-s1 I In real sturdge I Direct execution of I
i nstruct ions from r' the storage of vir- ,tual machine B , S r
i
s t imulation
outines
n real
torage I t Paging
routines
in real
storage
VM/370 dispatcher in
real storage LOAD PSW j
Figure 2. Real CPU Control Alternating between Direct Execution and Simulation of
Programs for Two Virtual Machines
are shared by both the virtual machine and the VM/370 control program. This sharing is
performed in such a manner that, for the purposes
of testing or setting the reference and change bits
of storage keys by program control, there appear to
be two independent sets of reference and change
bits. This is accomplished by maintaining two sets
of reference and change bits in addition to the real
storage key. Both additional sets of reference and
change bits are kept in the swap table.
There is one s\vap table for each real page table.
The word that precedes the first entry of each real
page table contains the address of the
corresponding swap table. A swap-table entry is
eight bytes long. Because VM/370 uses a real
4K-byte page size, each swap-table entry contains
four sets of reference and change bits-two sets for
the lower 2K-byte block and two sets for the upper
2K-byte biock. Each 2K-byte block has a backup
reference bit and a backup change bit for the VM/370 control program and a virtual reference
bit and a virtual change bit for the virtual machine.
At any instant, the VM/370 reference or change
bit is respectively the logical OR of the backup
reference or change bit and the reference or change
bit in the real storage key. Similarly, the virtual­
machine reference or change bit is the logical OR, respectively, of the virtual reference or change bit
in the swap table and the reference or change bit in
the real storage key. If a real page-table entry is
invalid, the corresponding virtual page has been
swapped out, but the virtual reference and change
bits have been preserved in the corresponding
swap-table entry.
Control of VM/370 Assists
Control register 6 points to a parameter list in real
storage which is used to locate control blocks and
tables used by the various VM/370 assists.
Additionally, individual bits in control register 6
and in the assist control word (MICACF, the fifth
word in the parameter list) determine which assist
functions are active. Each assist requires a specific
bit or group of bits to be ones for any function of
that assist to be active. Furthermore, additional
bits are used to activate or inhibit individual
functions or groups of functions of some of the
assists. Figure 3 shows these assignments.
Assists for VM/370 3

Positions
That Need
I Ones for Positions Used j General for Specific
Activation Activation VM!370 Assist CR6 MICACF CR6 MICACF Virtual machine 0 - 2 thru 5 -
Shadow-table bypass 0 8 -9 thru 15 Control program 6 ---
Expanded virtual machine 0,6 - - 0 thru 7
Virtual interval timer 0,7 - - - VH extended facility 29 ---
Figure 3. Bit Positions for General and Specific Activation of Assist Functions
The bit positions of control register 6 are used as
follows:
Bits Function
o
2
3
4
5
6
7
8-28
29 30-31 The functions of the virtual-machine assist, the
shadow-table-bypass assist, the expanded
virtual-machine assist, and the virtual-interval
timer assist can be activated only when this bit
is one.
This bit is the problem-state bit of the virtual­
machine PSW. The insert-storage-key function and the set­
storage-key function of the virtual-machine
assist can be activated only when this bit is
zero.
Functions which assist virtual-machine
instructions not found on System/360 can be
activated only when this bit is zero.
The supervisor-call function of the virtual­
machine assist can be activated only when this
bit is zero.
The shadow-table-validation function of the
virtual-machine assist can be activated only
when this bit 0 "12 , The functions of the expanded virtual-machine
assist and the new instructions of the control­
program assist can be executed only when this
bit is one.
The virtual-interval-timer assist can be
activated only when this bit is one.
These bits are bits 8-28 of the real address of
the doubleword-aligned parameter list.
The functions of the VM -extended-f acility assist
can be activated only when this bit is one.
These bits are not used. VM/370 constructs a six-word parameter list for
each virtual machine. This control block is called
4 Virtual-ylachine Assist and Shadow-Table-Bypass Assist
the MICBLOK in VM/370 logic publications. The
format and names of the words in the parameter
list are:
Bits of
Word 0 0-7 8-25
26-29 30 31
Bits of
Word 1 0-7 8-31
Bits of
Word 2
o
1-7
8-31
Bits of
Word 3
MICRSEG
Real segment-table length.
Bits 8-25 of the address of the real segment
table.
These bits are not used.
When the bit is zero, a 4K-byte real page size
is specified; when it is one, a 2K-byte real page
size is specified.
When the bit is zero, a 64K-byte real segment
size is specified; when it is one, a I M-byte real
segment size is specified.
MICCREG
These bits are not used.
Real address of virtual control registers (bits
29-3] must be zeros).
MICVPSW
When the bit is zero, no virtual interruption is
pending; when it is one, one or more virtual
interruptions are pending.
These bits are not used.
Real address of the virtual PSW (bits 29-31
must be zeros). MICWORK 0-7 These bits are not used.
8-31 Real address of 64-byte workspace used during
execution of assist functions on some models
(bits 29-3] must be zeros).