c.
CU - 0010
- T-N MPX
Signifies that multiplex storage (UCW Bump) will be addressed.
D. CU - 0011
- GUV-MN
M/LS
Signifies that main storage will be addressed if the G register 0 and/or 1 bits are on (1),
and that local storage (CPU Bump) will be addressed if the G register 0 and 1 bits are off
(0) •
4 ALTERNATE CU FIELD
A. CU
=
0001
- WRITE USE GR
Signifies that the selector channel data register GR is the destination for data instead of the
normal destination R register.
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IBM
Confidential

B. CU - 0010
579
603
-
K=O 11 0
PI
K-W
This signifies a module change (the K field value specifying that the address of the next
microword is in the 600 block).
C. CU
=
0011
-
OQR-D
A,
~
100
RO
G7
00
01
10
1 1
If
a trap occurred at this point in a microprogram, the WX register which contains the ad-
dress of the next microword (100) is set into the FWX register (backup ROSAR). The CH
and CL fields are interrogated and set into the X6 and X7 buffer latches.
-
FWX-WX
This instruction sets the FWX register (backup ROSAR) back into the WX register (100)
and interrogates the X6 and X7 buffer latches to determine what the branching status was
at the time of the trap, thus the instruction establishes the link address (100), which is the
first word executed after the trap has been satisfied.
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