switch the channels of one processor to the other processor. The channel set
switching instructions that the control program can use to connect and disconnect a
channel set to a processor are: CONCS DISCS connect channel aet disconnect channel set
Note: When you generate VM/SP as an MP system it does not use the channel set
switching facility even if the facility is installed on the hardware.
Advantages of the AP IMP Environment
An AP IMP environment provides additional processing capability when compared
to a uniprocessor environment. An AP IMP environment also provides increased
availability. In case of hardware malfunction on one processor, the other processor
can frequently continue operating. Serviceability is enhanced because it is possible
to use the VARY ON/OFF PROCESSOR command to vary a processor offline for
system repair or to upgrade the system.
Facilitating an AP IMP Environment I Prefixing
In an AP or MP environment, two processors share main storage. To facilitate this
sharing, VM/SP provides for the unique features and requirements of this envi­
ronment: prefixing, processor address identification, processor signaling,
time-of-day clock synchronization, interlocks on certain fetch and store
instructions, locks, and affinity setting. The system programmer should be familiar
with the instructions used to accomplish these tasks.
When VM/SP is executing in an AP IMP environment both processors cannot use
absolute page zero for status information. Instead, each processor has its own pre­
fixed storage area (PSA) in the high end of real storage. However, if the system
operator varies a processor online after CP initialization completes, the processor's PSA may be located in any page of the dynamic paging area. See Figure 29 on
page 210 for a storage map of the V=R machine after CP initialization. CP in Attached Processor and Multiprocessor Modes 209

Virtual storage
Addresses
Real Storage
Addresses OK ABSOLUTE PAGE 0 4K
Virtual Page 1
VIRTUAL=REAL AREA
SIZE = 128K BYTES
128K-l (Minimum size ;s 32K bytes.) 128K
Virtual page 0 132K (DMKSLC) REMAINDER OF CP Resident Nucleus 1 End of CP Nucleus (DMKCPE) and
FREE STORAGE <---. PSA FOR ATTACHED OR NON-IPL PROCESSOR PSA FOR MAIN OR IPL PROCESSOR < ____ DMKPSA 512K End of
real storage
Figure 29. Storage Layout in a Virtual = Real Machine I Prefix Registers
The control program puts the addresses of the PSAs in the prefix registers of the
two processors during system initialization. The control program can set and
inspect the contents of the processor's prefix register by using the privileged
instructions:
SPX -set prefix • STPX -store prefix
If you are operating in AP /MP mode, VM/SP uses the prefix registers. When
code executing on either processor references an address from 0 to 4095, the refer­
enced address is added to the contents of the prefix register for that processor to
produce the absolute address that will be accessed. In this way, each processor can
independently control its operations with separate channel address words and
channel status words. Prefixing is described in detail in System/3 70 Principles of
Operation.
Identifying a Processor Address
The hardware assigns the processor address during system installation. To deter­
mine the address of the processor that is executing, the control program issues the
privileged instruction:
ST AP store CPU address
VM/SP stores both processor addresses in both PSAs in the following fields:
210 VM/SP System Programmer's Guide