path. If the RCUBLOK is marked scheduled and the present request will not
release the control unit (example: TAPE FSF and TAPE BSF), the IOBLOK is
queued off the RCUBLOK and a search is made for an alternate control unit path.
If the RCUBLOK is marked scheduled and the present request will release the con­
trol unit, the search continues for a channel path. If the RCUBLOK is not marked
scheduled or busy but there are other I/O requests queued on the RCUBLOK, the
check is again made to see if the present request will release the control unit. If the
present request will not release the control unit, the request is queued and a search
is made for an alternate control unit path. Otherwise, the search continues for a
channel path.
The RCUBLOK "busy" and "scheduled" indicators are only turned on for shared
control units. The busy and scheduled indicators are turned on in the RCUBLOK for tape and 2314 DASD control units. The non-shared DASD RCUBLOKS never
have the busy and scheduled indicators in the "on" status. For this reason, alter­
nate control unit path selection rarely takes place for non-shared control units. The
one exception occurs when the channel path through the first control unit appears
busy (because a real channel busy condition was encountered). If an alternate path
exists through a second control unit, the control blocks associated with the second
control unit path are examined.
Finding an available channel path is the final step prior to issuing the SIO. If the RCHBLOK is marked busy, a search is made for an alternate channel path. If the RCHBLOK has other requests queued on the RCHBLOK, a search for an alter­
nate channel path is made. VM/370 never marks a byte multiplexor RCHBLOK busy. The only time a block multiplexor is marked busy is after a condition code 2
has been encountered. The I/O load on block multiplexor channels must be suffi­
cient to cause channel busy conditions before path selection on an alternate chan­
nel can take place.
MVS/System Extensions Support
The MVS/System Extensions support in VM/SP allows an MVS system running in
a virtual machine to exploit the enhancements available in the MVS/System Exten­
sions Program Product (Program No. 5740-XEl) if the System/370 Extended
Facility or System/370 Extended Feature is present on the hardware.
Included in the MVS/System Extensions Program Product enhancement is the use
of:
1. The System/370 Extended Facility for the 303x and the 308x processors, or
2. The System/370 Extended Feature for the System/370 Model 158 and 168
processors, or
3. ECPS:MVS for the 4341.
Note: An RPQ (MK3272) is available for the 158-3 processor that allows the
coexistence of virtual machine assist and System/370 Extended Facility (S370E) and VM/370 Extended Feature. Thus, an MVS/SE virtual machine can run under
VM/SP with virtual machine assist active on a 158-3 processor. ECPS:MVS and
ECPS:VM/370 are mutually exclusive in the 4341 Model Group 1 and 4341 Mod­
el Group 2. The control storage expansion feature of the Model Group 2 allows
coexistence of ECPS:MVS and ECPS:VM/370.
Performance Guidelines 45

The System/370 Extended Facility and System/370 Extended Feature, and
ECPS:MVS are enabled by the MVS/System Extensions support as defined by the
directory OPTION statement or via the CP SET command. For details, refer to the
VM/SP Operator's Guide, and the VM/SP CP Command Reference For General Users, respectively.
MVS/System Extensions support includes:
Low address protection facilityl
Common segment facilityl
Special MVS instruction operation facilities
Low Address Protection Facility
Common Segment Facility
The low address protection facility provides protection against improper storing by
instructions using logical storage addresses in the range 0-511. This facility pre­
vents inadvertent program destruction of those storage locations that the processor
uses to fetch new PSWs during interruption processing. Low address protection
does not apply to the storing of status by the processor (for example, old PSWs, logout data), nor does it apply to any channel stores (for example, CSW or LCL).
Bit 3 of control register 0 is defined as the low address protection bit, and is used
to control whether or not stores using logical addresses in the range 0 to 511 are
permitted. When this bit is zero in real control register zero, stores are permitted;
when this bit is one, stores are not permitted. When an instruction attempts a store
using an address in the range 0 to 511 and low address protection applies, the con­
tents of the storage area addressed by the instruction are not modified. The exe­
cution of the current instruction is terminated or suppressed, and a protection
exception The common segment facility allows addressing segments to be classified as private
or common. If bit 30 of the segment table entry for a given segment is 1, the seg­
ment is a common segment; otherwise it is private. A private segment table entry
and the page table it designates may be used only in association with the segment
table origin (STO) that designates the segment table in which the segment table
entry resides. A common segment table entry and the page table it designates may
continue to be used for translating addresses even though a different STO is speci­
fied by changing control register 1.
Special MVS Instruction Operation Handling Facilities
Special operations and instructions in the MVS/System Extensions Program Prod­ uct that enhance MVS operations are handled by System/370 Extended Facility or
System/370 Extended Feature, and are described in the IBM publication
System/370 Extended Facility, GA22- 7022. Invalidate Page Table Entry (IPTE) and Test Protection (TPROT) instructions described in this publication are simu­
lated in VM/SP. 46 VM/SP System Programmer's Guide
ECPS:MVS is identical to the Extended Facility, except that the Low Address Protection Facility
and the Common Segment Facility are not included.