10. Twice the real page index of the virtual
segment-table entry address is added to the
page-table origin from the segment-table entry
to obtain the real address of the page-table
entry for translating the virtual segment-table­
entry address. This address is used with a key
of zero to fetch the corresponding real page­
table entry P AGCORE. Execution ends if an
addressing condition is encountered (6).
11. Execution ends with a program-interruption for
a privileged-operation exception if the page­
table entry is invalid or has an invalid format
(7).
12. The real address of the virtual segment-table
entry is computed and used with a key of zero
to fetch the virtual segment-table entry.
Execution ends if an addressing condition is
encountered (8).
13. If the segment-table entry fetched was invalid,
condition code 1 is set, the virtual address of
the virtual segment-table entry which was
developed in step 7 is placed in the general
register specified by the R 1 field of the
instruction, and execution of this function ends
with completion of the LOAD REAL ADDRESS instruction (9).
14. If the segment-table entry fetched had an
invalid format, execution of this function ends
with a program interruption for a privileged­
operation exception (10). 15. If the value of the four leftmost bits of the page
index developed in step 6 is greater than the
value of bits 0-3 of the segment-table entry
fetched, execution of this entry ends with
completion of LOAD REAL ADDRESS. In
that case, condition code 3 is set, and the
virtual address of the page-table entry that
would have been referred to had no length
violation existed is placed in the general
register specified by the Rl field of the
instruction (11).
16. The virtual address of the virtual page-table
entry is computed by using the page index
developed in step 6. The real segment index
and the real page index of the virtual address
for the virtual page-table entry are found. The
real page size is 4K bytes or 2K bytes as bit 30 of MICRSEG is zero or one, and the real
segment size is 64K bytes or 1M byte as bit 31
of MICRSEG is zero or one. For a 64K-byte
segment, execution ends with a program
interruption for a privileged-operation
exception if the segment-table length in bit
positions 0-7 of MICRSEG is less than the
value obtained by appending four zeros to the
left of bits 8-11 of the virtual page-table-entry
14 Virtual-Machine Assist and Shadow-Table-Bypass Assist
address (12).
17. The address of SEGP AGE, the real segment­
table entry for translating the virtual page­
table-entry address, is computed. This address
is used with a key of zero to fetch the
corresponding real segment-table entry.
Execution ends if an addressing condition is
encountered (13).
18. Execution ends with a program interruption for
a priVileged-operation exception if the real
segment-table entry fetched is invalid or has an
invalid format or if the leftmost four bits of the
real-page index of the virtual page-table-entry
address are greater in value than bits 0-3 of the
real segment-table entry fetched (14).
19. Twice the real page index of the virtual page­
table-entry address is added to the page-table
origin from the segment-table entry to obtain
the real address of the page-table entry for
translating the virtual page-table-entry address.
This address is used with a key of zero to fetch
the corresponding real page-table entry
PAGCORE. Execution ends if an addressing
condition is encountered (15). 20. Execution ends with a program interruption for
a priVileged-operation exception if the real
page-table entry fetched is invalid or has an
invalid format (16).
21. The real address of the virtual page-table entry
is computed and used with a key of zero to
fetch the virtual page-table entry. Execution
ends if an addressing condition is encountered
(17).
22. If the virtual page-table entry fetched is invalid,
condition code 2 is set, the virtual address of
the page-table entry which was developed in
step 16 is placed in the general register
specified in the R 1 field of the instruction, and
execution of this function ends with completion
of the LOAD REAL ADDRESS instruction
(18).
23. If the virtual page-table entry fetched had an
invalid format, execution of this function ends
with a program interruption for a privileged­
operation exception (19).
24. Execution ends with completion of the LOAD REAL ADDRESS instruction. Condition code
o is set, and a new value is placed in the
general register specified by the Rl field of the
instruction. Bits 0-7 of that general register are
set to zeros. Bits 8-31 are set to the value
obtained by prefixing the page-frame address in
the entry fetched in step 21 to the byte index
developed in step 6 (20). Figure 9 summarizes the fields used.

FIeld Control Address tlffsetNo. of Name Slock Type (Hex.l8ytes l:of.'ftetlts i.-. _ M I __ t,i __ __ ---t-li ____ 4 f' Add reo 5 S of rea ,I i 1- _ -t ---t- ---- segment tab I e -----t I ffrHCBLUK! Real 14 4 I Address of ECBLOK " I EJ(TCRO IEc-alDK t
aea1 I 0 4 !Virtual CRG EXTCRl I ECiLOK 'Real I 4 4 iVir'tual CRl SC:GPAGE lSEGTABLE Rea I 4SX I 4 I Segment-table entry -PAGCORE tP'AGTASLE Real 2PXl 2 IPage-table entry I .t" II Re'a 1 0 4" Vir, tua .• 1 segment ... tab le I entry SEGPAGE SEGTABLE Real 4SX
2 4 Ie entry PAGCQRE PAGTASLE . . Real 2PX
2 2 Page-table entry I Real 0 2 I Vi.r·tual page-table
entry References to the real trans lat.ion tables to translate
the virtualadd.ress of the virtual segment-table entry
2 References to the real translation tables to translate
the virtual address of the virtual page-table entry Figure ,,, Fidds Used in LOAD REAL ADDRESS RESET REFERENCE BIT
The virtual RESET REFERENCE BIT instruction
is executed for a virtual machine if the virtual­
machine assist is activated for System/370 instructions, unless (1) a virtual-machine exception
is recognized, (2) the real page size is 2K bytes, or
(3) some pertinent VM/370 control field cannot be
accessed.
The reset-reference-bit function of the virtual­
machine assist is invoked each time a CPU attempts
to execute a RESET REFERENCE BIT instruction
when the problem-state bit of the real PSW is one.
Execution of this function consists in performing
the following steps:
1. Execution of this function ends with a program
interruption for a privileged-operation
exception if bits 0-3 of control register 6 are
not IOXO binary (1.A.I).
2. The word MICRSEG, which contains the real
segment-table address, is fetched with a key of
zero. Execution ends if an addressing
condition is encountered (1.A.2).
3. Execution ends with a program interruption for
a priVileged-operation exception if bit 30 of
MICRSEG is one (1.A.3).
4. If an access condition is encountered in
fetching the second halfword of the RESET
REFERENCE BIT instruction, execution of
this function ends with a program interruption
for that access exception (1.B).
5. The second-operand effective address is
partitioned to obtain the segment index and the
page index. The partitioning of the address is
based on 4K-byte pages and either 64K-byte or
1M-byte segments, depending on whether bit
31 of MICRSEG is zero or one, respectively.
For a 64K-byte segment, execution ends with a
program interruption for a privileged-operation
exception if the segment-table-length value in
bit positions 0-7 of MICRSEG is less than the
value obtained by appending four zeros to the
left of bits 8-11 of the second-operand address
(2).
6. The address of SEGPAGE, the real segment­
table entry, is computed, and the entry is
fetched with "a key of zero. Execution ends if
an addressing condition is encountered (3).
7. Execution ends with a program interruption for
a privileged-operation exception if the
segment-table entry is invalid, if the entry has
Virtual-Machine Assist 15 I