I SWTCHVM Macro
Routines that must lock a virtual machine other than the current virtual machine
use the SWTCHVM macro. The SWTCHVM macro unlocks the VMBLOK speci-.
fied in register 11 and locks the VMBLOK specified in register 1. Time charging is
also switched. The format of the SWTCHVM macro is:
SWTCHVM [STAY] [NOUPDT]t \ where:
label is any desired label
STAY indicates that if the VMBLOK lock is not available, a CPEXBLOK will
be stacked for the current processor. NOUPDT indicates that the VMBLOK should be locked without checking for
shared segments. UNLOCK indicates that the current VMBLOK is unlocked, register 11 is updated
to point to VMBLOK specified in register 1, the timer is switched to start
charging supervisor time to the new VMBLOK, but the new VMBLOK is not locked. Note: The UNLOCK option cannot be specified with
either of the other options.
Configuring and Debugging MP Systems I The user should keep the following things in mind when configuring I/O devices
for an MP system and when debugging an AP /MP System.
Configuring I/O Devices for an MP System
When you configure I/O devices, you should consider the following:
The possibility of a hardware failure
Smooth transition when you reconfigure between MP and uniprocessor (UP)
modes for maintenance.
In either of these cases to ensure maximum system availability, you should provide
paths from both processors to I/O devices. You can do this in several ways:
Configure symmetrically as many channels and I/O devices as possible.
Install channel-switching and string-switching features on control units where
possible. A channel switch is a feature on a control unit that enables two real
processors to share a symmetric device. A symmetric device is a device that
can be accessed by both processors, while an asymmetric device cannot be
shared. A string switch enables you to attach a symmetric I/O device to two
separate control units. These features provide access to I/O devices from both
processors. This increased access reduces the possible loss of access to critical I/O devices because of hardware malfunctioning. CP in Attached Processor and Multiprocessor Modes 219

Configure asymmetric devices through a manual switching unit. Then the
operator can physically attach these devices to either processor, one processor
at a time. Asymmetric devices include printers, card readers, punches, and
information display systems.
Provide redundant control units for critical I/O devices.
Debugging an AP / MP System
IpSA I Trace Table I Lockwords I you debug an AP /MP problem, the following areas provide pertinent infor­
matIOn:
A dump for a program operating in AP or MP mode contains three PSAs --the
absolute PSA, one for the IPL processor and one for the other processor. In a
formatted dump the PSA for the IPL processor is displayed first and the PSA for
the other processor is displayed second. The PSA contains important information
about the status of each processor. See VM / SP Data Areas and Control Block Log­
ic, Volume 1 for an explanation of the fields in the PSA.
In an AP /MP system, the trace table entries for both processors are intermixed.
However, you can identify which processor made a particular entry by looking at
the trace code in the first byte of the trace table entry. If bit 1 of the trace code
contains a zero, the entry was made by the IPLed processor; while if bit 1 of the
trace code contains aI, the entry was made by the other processor. Processor
identification information is implemented for an AP /MP system at system initial­
ization when the system assigns each processor a trace identifier. The system
assigns the IPLed processor a trace identifier of X'OO' and the non-IPLed process­
or a trace identifier of X'40'. The identifier is ORed with the trace code when an
entry is made in the trace table thus providing an easy way of determining which
processor made a particular entry.
The following trace table entries appear in an AP /MP environment:
X'12' indicates that the processor is spinning on a lock
X'13' indicates that a processor issued a signal processor
(SIGP) instruction
X'01' may reflect multiprocessing-related external interruption
codes (also appears in a uniprocessor environment)
When you are debugging an AP /MP system, you must relate the entries made by
one processor to the entries made by the other processor in the same time period.
For example, a signal processor (code X'13') entry by one processor should be fol­
lowed closely by an external interruption (code X'OI ') for the other processor. See
the "CP Internal Trace Table" section and Figure 67 on page 499 earlier in this
publication. Trace table pointers (the address of trace table start, the address of
trace table end, and the address of the next available trace entry) are in absolute
page zero.
You can look in the DMKLOK module to find the status of the various VM/SP
locks except the VMBLOK lock and the RDEVBLOK lock. Each of the locks in DMKLOK contains four fullwords of information. The first fullword contains the
logical processor address of the owning processor. This will be zero if the lock is 220 VM/SP System Programmer's Guide