SV C Interrupt When an SVC interrupt occurs, the SVC interrupt routine is entered. If the
machine is in problem mode, the type of interrupt (if it is other than an SVC 76 or ADSTOP SVC) is reflected to the pseudo-supervisor (that is, the supervisor operat­
ing in the user's virtual machine). Control is transferred to the appropriate inter­
rupt handler for ADSTOP SVCs and all SVC 76s.
If the machine is in supervisor mode, the SVC interrupt code is determined, and a
branch is taken to the appropriate SVC interrupt handler.
If a timer interrupt occurs, CP processes it according to type. The interval timer
indicates time slice end for the running user. The clock comparator indicates that a
specified timer event occurred, such as midnight, scheduled shutdown, or user
event reached.
The external console interrupt invokes CP processing to switch from the 3210 or
3215 to an alternate operator's console.
A service signal is a class 24 external interrupt that is generated when either a log­
ical device or the Maintenance and Service Support Facility (MSSF) signals com­
pletion of an operation initiated by a program (in the case of the logical device DIAGNOSE X'7C') or CP, (in the case of the MSSFCALL DIAGNOSE X'80'). See the expanded descriptions of DIAGNOSE codes X'7C' and X'80' in "Part 1.
Control Program (CP)". Also refer to IBM System I 3 70 Principles of Operation,
GA22- 7000 for a general description of external interrupts.
Synchronous Interrupts in an Attached Processor or Multiprocessor System
Real 110 Interrupts
Generally, when synchronous interrupts (such as program and SVC interrupts)
occur in an attached processor or multiprocessor system, the processing of the
interrupt can proceed without the global system lock for mainline, nonerror paths.
Otherwise, the global system lock is required. If the global system lock is needed
and it is already in use, the processing of the interrupt is deferred until the global
system lock is available. In this case, the interrupted processor attempts to run
another user.
In an attached processor configuration, only the main processor can receive real 110 interrupts. To ensure this, the channel masks in control register 2 on the main
processor are initialized to ones to enable interruptions from any available channel. On the attached processor, the channel masks in control register 2 are initialized to
zeros. In a multiprocessor configuration, both processors can receive real 1/0 interruptions. The channel masks in control register 2 on both processors are ini­
tialized to ones to enable interruptions from any available channel.
Interruption Handling 23
Performance Guidelines General Information The performance characteristics of an operating system, when it is run in a virtual
machine environment, are difficult to predict. This unpredictability is a result of
several factors:
The System/370 model used.
The total number of virtual machines executing.
The type of work being done by each virtual machine.
The speed, capacity, and number of the paging devices.
The amount of fixed head paging storage (drum, 3340, 3344, 3350, 3380) The amount of real storage available. The degree of channel and control unit contention, as well as arm contention,
affecting the paging device. The type and number of VM/SP performance options in use by one or more
virtual machines.
The degree of MSS 3330 volume use.
The order in which devices are selected for preferred paging and spooling.
Performance of any virtual machine may be improved by the choice of hardware,
operating system, and VM/SP options. The topics discussed in this section
address:
1. The performance options available in VM/SP to improve the performance of a
particular virtual machine.
2. The system options and operational characteristics of operating systems run­
ning in virtual machines that affect their execution in the virtual machine envi­
ronment.
The performance of a specific virtual machine may never equal that of the same
operating system running standalone on the same System/370, but the total
throughput obtained in the virtual machine environment may equal or better that
obtained on a real machine.
When executing in a virtual machine, any function that cannot be performed wholly
by the hardware causes some degree of degradation in the virtual machine's per­
formance. As the control program for the real machine, CP initially processes all
real interrupts. A virtual machine operating system's instructions are always exe­
cuted in problem state. Any privileged instruction issued by the virtual machine
causes a real privileged instruction exception interruption. The amount of work to
be done by CP to analyze and handle a virtual machine-initiated interrupt depends
upon the type and complexity of the interrupt.
24 VM/SP System Programmer's Guide
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