For external interrupts that can occur in attached processor .ode
(time-of-day sync check, malfunction alert, external call, and emergency signal), DMKPSAEX gives control to DMKEXTSL. DMKEXTSL does the
following for each kind of interrupt: Malfunction alert • Call DMKMCTMA, which will either load a disabled wait state on the
appropriate processor or initiate automatic processor recovery, to
allow the system to run in uniprocessor mode. If a user was running
at the time of the malfunction alert he is terminated. SHUTDOWN Emergency Signal Issued to the attached processor prior to shutting the system down. • Turn off APUOPER in each PSA to indicate that the attached processor
is not operational. • Load a 008 disabled wait PSi. • Disable channel zero. • Pass control to the dispatcher at DMKDSPRU. QUIESCE Emergency signal • Give control to the dispatcher at DftKDSPRU, which will load a wait PSW that is enabled for external calls only. SYNC Emergency Signal Issued by DMKCLKMP when the clocks are no longer synchronized (low order
synchronization). • Give control to DMKCLKAP to synchronize the
processor. If the set clock fails, the
terminated with a CLK003 abend.
CLKCHK Emergency Signal clock on
attached
the attached
processor is • Give control toDMKCLKCC. If the clock on the attached processor is
not synchronized with the main processor (high order synchronization)
or is not set, then a flag is set to cause DMKCLKMP on the main processor to synchronize the clocks. The attached processor is then
put in a wait state enabled for external interrupts. If the clock is not working, the attached processor is terminated with a CLK003 abend. APR External Call • Give control to DMKMCTPR to allow the system to run in uniprocessor mode. RESUME External Call
Cancels a previous QUIESCE. • Give control to the dispatcher at DMKDSPRU. 1-178 IB" V"/370 System Logic and Problem Determination--Volume 1

WAKEUP External Call "wake-up" an idle processor. • If the system was running a user, reload the external old PSW. • If the system was not running a user, then try to obtain the SYSTEa lock. • If the SYSTEM lock is obtained, give control to the dispatcher at DMKDSPCH. • If the lock is not obtained, give control to the dispatcher at DMKDSPRU. DISPATCH External Call
Inform the other processor of a processor related CPEXBLOK. • Try to obtain the global system lock. • If the system lock is obtained, go to the dispatcher at DMKDSPCH. • If the lock is not obtained and the system Was in a wait state, go to DMKDSPRU. • If the lock was not obtained and the system was not in a wait state,
reload the external old PSi. Time-of-Day SYNC Check • Call DMKCLKSC. DMKCLKSC signals the attached processor to quiesce.
It then sends message DMKCLK970W to the operator and calls D8KCLK8P. DMKCLKMP issues a SYNC emergency signal to synchronize the clocks. DMKCLKSC issues a RESUME signal to allow the attached processor to
continue. • If the SYSTEM lock is held, go to the dispatcher at DHKDSPCH. • If the SYSTEM lock is not held, go to the dispatcher at DHKDSPRU. I/O Subsystem
The I/O subsystem of V8/370 runs under the global system lock on either
the main processor (processor with I/O capability) or the attached
processor (processor without I/O capability). The I/O first level
interrupt handler (DHKIOSIN) is the only exception; it runs unlocked
during its normal error free processing. The main processor owns all
real I/O blocks (RCHBLOK, RCUBLOK and RDEVBLOK). DHKIOSII always runs on
the main processor because only the main processor can receive I/O interrupts. All other routines that set any fields within the real I/O control blocks or that are dependent upon the status of a real I/O control block remaining static, must use the SWITCH macro to force their
processing to the main processor. All routines within DHKIOS with the
exception of DHKIOSRW, reissue the SWITCH macro whenever loss of control
is a possibility, to ensure that processing remains on the main processor.
The SWITCH macro tests to see if it is running on the attached
processor or the main processor. If it is running on the attached
processor it issues an SVC 24 to transfer control to the .ain processor
and to resume execution at the next sequential instruction. CP Introduction 1-179