To use fetch protection, a virtual machine must execute the set
storage key (SSK) instruction referring to the data areas to be
protected, with the fetch protect bit in the key. VM/370 subsequently:
1. Checks for a fetch protection violation when handling privileged
and nonprivileged instructions.
2. Saves and restores the fetch protection bit (in the virtual storage
key) when writing and recovering virtual machine pages froB the
paging device.
3. Checks for a fetch protection violation on a write CCW (except for
spooling or console devices).
A special case of storage protection occurs when the CMS nucleus
resides in a protected shared segment. The CMS nucleus may be protected
and still be shared by many CftS users. After a virtual machine has used
a protected shared segment, the pages are checked for changes. If any
pages have been changed, the user gets placed in console function mode after error :essage DMKVKA U 56W. the changed page is
returned to CP free storage. EXECUTING THE PAGEIBLE CONTROL PROGRAM Calls to pageable routines are recognized at execution time by the SVC 8
linkage manager in DMKSYC. For every SVC 8, the called address (in the
caller's GPR15) is tested to see if it is within the resident nucleus.
If it is less than DMKCPEND and greater than DMKSLC, the called
routine's base address is placed in GPR12 and control is passed to the
called routine in the normal way. However, if the called address is
above DftKCPEND or below DMKSLC, the linkage manager issues a TRIIS macro, requesting the paging manager to locate and, if necessary,
page-in the called routine. The TRANS is issued with LOCK option.
Thus, the lock count associated with the called routine's real page
indicates the responsibility count of the module. • When the module is called, the count is incremented. • When the routine exits via SVC 12, the count is decremented. When the count reaches zero, the pageable routine is unlocked and is
eligible to b-e paged out of the system. However, because all CP
pageable modules are reenterable, the page is never swapped out, but
when the page is stolen, it is placed directly on the free page list.
Because unlocked pageable routines participate in the paging process
in a manner similar to user virtual storage pages, the least recently
used approximation used by page selection tends to make highly used
control program routines, even when not locked, remain resident. The
called routine is locked into real storage until it exits. Thus, it can
request asynchronously scheduled function, such as I/O or timer interrupts, as long as it dynamically establishes the interruption
return address for the requested operation and does not give up control
via an EXIT macro prior to receiving the requested interruption.
Addressability for the module, while it is executing, is guaranteed
because the CALL linkage loads the real address of the paged module into
GPR12 (the module base register) prior to passing control. If all
addressing is done in a base/displacement form, the fact that the Bodule is executing at an address different from that at which it was loaded is
not apparent. llthough part of CP is pageable, it never runs in
relocate mode. Thus, the processor is not degraded by the DIT feature
being active, and no problems occur because of handling disabled page
faults.
1-78 IBM Y8/370 System Logic and Problem Determination--Voluae 1

SYSTEM SUPPORT MODULES The system support modules provide CP with several co.mon functions for
data conversion and control block scanning and verification. ftost of
the routines are linked to via the BALR option of the CALL .aero, and
aake use use of the BALRSAVE and TEMPSAVE workareas in DftKPSA. Two exceptions are the virtual and real I/O control block scan routines DMKSCNVU and DMKSCNRU. These routines do not alter the contents of the BALRSAVE area, and hence may be called by another low-level BALR
routine. CONTROL REGISTER USAGE Every IBM System/370 processor provides the program with 16 logical
control registers (logical registers since the number that are active
depends on the features installed in the machine at anyone tiae) that
are addressable for loading and storing from basic control (BC) aode. VM/370 provides only a single control register, control register zero,
for normal virtual machines, and for processing systems that do not
require the full set of registers (for exaaple, CMS, DOS, or other
operating systems for System/360). Any user whose virtual machine operating system requires the use of
control registers other than control register zero, can request the full
set of 16 registers by specifying the ECBODE option in the Vft/37 0 directory entry for his virtual aachine. A virtual machine, which utilizes any Systea/370 features that use
the control registers, requires the ECftODE option. Soae of these
features are expanded timer support of the Systea/370 CPU tiaer, clock
comparator, etc., the virtual relocate mode and its instructions, RRB,
LRA, PTLB, virtual monitor calls, virtual Program Event Recording (PER), etc. RESTRICTIONS IND CONVENTIONS FOR PAGEABLE CP nODULES Pageable CP modules must observe the following restrictions and
conventions when they are designed and coded: • The module must be entered by the standard SVC Bodules entered by BALR or GOTO cannot be pageable.
return to its caller by SVC also.
8 CALL linkage. The module aust • The module cannot contain any A- or V-type address constants that
point to locations within itself or within other pageable modules, and it cannot contain any CCWs that contain data addresses within
themselves. The only exceptions are address constant literals
generated as the result of calls to other modules (because these
addresses are dynaaically relocated at execution time, they aust be
resolved by the loader to the loaded address of the called aodule)
and a pageable module that locks itself into storage. In practice,
this restriction means that data or instructions within the page able
routine must be referenced via base/displacement addressing, and the
address in register 15 for a CALL may not be generated by a LOAD ADDRESS instruction. • The pageable aodule aust be no more than 4096 bytes in length. CP Introduction 1-79