External Interruption TIBER IRTERRUPTION If DBKPSAEI is entered because of a tiaer interruption, the state of the
aachine aust be deterained. If the aachine was in wait state, control
is transferred to DBKDSPCH, and the aachine stays idle until another
interruption occurs. If the machine is in problea state
l
the address of
the current user's VBBLOK is obtained froa RURUSER. The user's current PSW (VBPSW) is updated fro. the external interruption old PSW, the
address of the current VBBLOK is placed in register 11, and control is
transferred to DBKDSPCH. Por additional information about tiaers, see "Virtual Tiaer Baintenance." EXTERRAL INTERRUPTION If D!KPS!EX cntersd because the pLesseu console
interrupt button (IRTERRUPT), a CPEXBLOK is stacked to do the following: Reference the current systea operator's VBBLOK (DBKSYSOP). Disconnect this virtual machine. The operator can now log on froa another terainal. Pressing the
console interrupt button activates an alternate operator's console.
Rote: If this interrupt COaes froa the attached processor, it is
ignored. Por a description of the processing of the external interruption coaaand, refer to .odule DBKCPB in Section 2. See nBultiprocessor External Interrupts" for a discussion of external
interrupts that occur in attached processor aode. EXTEBDED VIRTUAL EXTERNAL INTERRUPTIONS To reflect external interruptions to a virtual aachine, DBKDSPE queues
an XINTBLOK on a chain pointed to by VBPXIBT in the VBBLOK. The XIITBLOKs are chained sequentially by the XIRTSORT field that contains
the collating nuaber of the pending interruption. If aore than one
interruption has the saae collating nu.ber, the interruption codes are ORed together in the XIRTCODE field for possible siaultaneous
reflection. When a virtual machine is enabled for external interruptions. the XIBTBLOK queue for that machine is searched for an eligible block. In XIBTBLOK is eligible for reflection if one or aore bits of the XIBTBISK field match the bits in the rightmost halfword of control register O. If the interruption was an interruption such as CPU timer or clock
coaparator, the block is left chained because reflection does not reset
these interruptions. If the reflected interruption(s) does not
represent all those coded in the XIRTBASK field, the block is left
chained and only the interruptions that were reflected are reset. In
all other conditions, the XINTBLOK is unchained and returned to free
storage.
1-76 IBB V8/370 Systea Logic and Proble. Deteraination--Voluae 1
A special external interrupt, code 1'4001' notifies a virtual machine
of a pending Virtual Machine Communication Facility request. The XINTBLOK for this interrupt is set up with an XINTSORT field of
I'7FFFFFFF', the lowest priority. System Support FREE STORAGE MANAGEMENT During its execution, CP occasionally requires small blocks of storage
that are used for the duration of a task. CP obtains this storage from the free storage area. The free storage area is divided into various
size subpools. The requester informs the free storage manager of the
size of the block required and the smallest available subpool that
fulfills the request is allocated to the requester. When the block is
no longer needed, the requester informs the free storage manager and CP returns the block to free storage.
If the request for free storage cannot be fulfilled, the free storage
aanager requests the teaporary use of a page of storage from the dynaBic
paging area. If a page is obtained, the page is chained to the free
storage area and used for that purpose until it is no longer needed and
subsequently returned to the dynamic paging area.
If the request for a page cannot be fulfilled; the requester waits until free storage becomes available. STORAGE PROTECTION VM/370 provides both fetch and store protection for real storage. The
contents of real storage are protected froa destruction or misuse caused
by erroneous or unauthorized storing of fetching by the program. Storage is protected from improper storing or from both improper storing
and fetching, but not from improper fetching alone. When the processor accesses storage, and protection applies, the
protection key of the current PSW is used as the co.parand. The
protection key of the processor is bit positions 8-11 of the PSi. If the processor access is prohibited because of
violation, the operation is suppressed or terminated,
interruption for a protection exception takes place.
a protection
and a program When the reference is made to a channel, and protection applies, the
protection key associated with the I/O operation is used as the comparand. The protection key for an I/O operation is in bit positions 0-3 of the CAW and is recorded in bit positions 0-3 of the CSi stored as
a result of an I/O operation. If channel access is prohibited, the CSi stored as a result of the operation indicates a protection-check
condition. When a storage access is prohibited because of a store protection
violation, the contents of the protected location remain unchanged. If
a fetch protection violation occurs, the protected information is not
loaded into an addressable register, moved to another storage location,
or provided to an I/O device. CP Introduction 1-77
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