shared segment, the active segment table entry count is decreased. Por a shared segment, if the active count is still greater than zero, no
further processing is done. If the count has decreased to zero, for a
shared segment, processing continues as if it were a private segment. Each page table entry in a segment is then examined for an in-storage
page. If one is found, it has its reference bit reset to zero. In
addition, if the heavy paging condition flag has been set, the page
table entry is aarked invalid, and the real page is placed on the flush
list in last-in-first-out order.
The page replacement/page selection algorithm aust find a real fraBe to
satisfy a demand for a virtual page. It first attempts to satisfy the demand with a page from the flush list. The flush list contains virtual
pages (if any) that belong to virtual machines that are not eligible for
dispatching, and therefore are not being used.
Note: A virtual machine may reenter the dispatch list after its pages
have been placed on the flush list. If the virtual aachine atteapts to
access any of those pages, they will be reclaiaed. The pages are placed
on the flush in last-in-first-out order under the assumption that the
longer they remain on the list, the higher the probability the virtual machine will reenter the dispatch list and reclaia thea.
If no pages are found on the flush list, the selection algorithm examines each virtual page in real storage, searching for an available
page that does not have its reference bit on. It begins the search at
the first available virtual page at the high end of real storage and
searches by descending page address. When it reaches the lowest
available page address, it starts again froa the top of storage. When a
page has been found, that page address minus one is checkpointed. The
next time the selection algorithm is invoked, it will start froa the
checkpointed address. As the selection process proceeds, those pages
that were not selected have their reference bits turned off. When the
selection algorithm is operating in this mode, a virtual page Bust be
referenced at least once per reset cycle (loop around real storage) to
avoid selection. I BACKING STORE ALLOCATION ALGORITHM There are two parts to the algoritha for allocation of a DASD page
record. The first is to find the optiaal device on which to allocate a
record. The second is then to optiBize the record allocation on a
particular device. CP maintains the DASD device chain in two parts. The major part is the
ordering of all devices by type and by the TEMP/PAGE classification.
All PAGE devices are ordered before all TEMP devices. The device type
ordering is: 2305, 3350, 3340, 3330, and 2314. All devices of the saBe type are chained together off the priaary chain. CP atteapts to
allocate a page record on the highest-level device until all devices at
that level are full and then it tries the next lower device type. Within a particular device type, CP allocates records in a round-robin
aanner, attempting to evenly distribute the allocated records. CP Introduction 1-115

Once a device is selected, CP .ust determine on which cylinder to
allocate a record on that device. CP maintains a chain of cylinder
record maps, one for each allocatable cylinder on the device. For 2305 devices, CP attempts to keep cylinder map blocks at the head of the
chain. The only optimization done for a 2305 is an atte.pt to minimize the amount of processor time involved in the allocation process. For movable-arm DASD (that is, not 2305), CP attempts to allocate the first
available record found when scanning the cylinder map chain. I Whenever a changed page is selected for replacement, it must first be I copied onto DASD before the real page can be made available. In cases I wbere there is already a DASD record allocated for the page and it is on I a movaDie-arm the page selectiun vlu I record and requests that a new record be allocated. This occurs each I time a page is to be written and its current backing-store location is I on a movable-arm DASD. Although this represents overhead in teras of I processor use, it is justified because it should minimize arm movement I and reduce page wait tiae. PAGE I/O REQUEST QUEUEING ALGORITHM Tbe ordering of page I/O requests
initiation with one SIO is done on
priority is:
1. In-queue requests
2. Not-in-queue requests
3. Reads
4. Writes 5. Q1 requests
6. Q2 requests
that are
a priority
chained together
ordering basis.
for
The PCI flags are set for page I/O requests. For non-2305 requests, there
is an interruption after each request. For 2305 requests, the PCI flag
is set so that there is one interruption for each revolution of the drum (one interruption for every three requests).
Note: For installations that are .uch more constrained by a page I/O bottleneck (as opposed to processor bottleneck), the 2305 PCI .ode can
be changed to operate in the same way as the non-2305 processing, that
is, by allowing an interruption immediately after each request. The SET SRM PCI DISK command causes the PCI flag to be set so there is one
interruption for eacb 2305 page request. SET SR! PCI DRU! cbanges it
back to the default mode of operation. VIRTUAL STORAGE PAGING ERROR RECOVERY Errors encountered during virtual storage (as opposed to spooling)
paging operations can generally be classified as either soft or hard
errors. Soft errors allow the system to continue operation without delay
or degradation. Hard errors can cause noticeable effects such as the
1-116" IBM VM/310 System Logic and Problem Deteraination--Volume 1