8.37.4 Examples

Example 1:

Set the target address for subsequent Hercules commands to CPU #4 in a multiprocessor configuration
and display the general purpose registers for this CPU.

HHC00013I Herc command: 'cpu 4'

HHC00013I Herc command: 'gpr'

HHC02269I General purpose registers

HHC02269I CP04: GR00=00000000 GR01=062B7000 GR02=0178F500 GR03=040C1E18

HHC02269I CP04: GR04=00000000 GR05=00000021 GR06=00000000 GR07=0146B847

HHC02269I CP04: GR08=00000000 GR09=03EB0980 GR10=00F67400 GR11=04755D78

HHC02269I CP04: GR12=0146A848 GR13=040C0390 GR14=00000000 GR15=00000336

Figure 80: CPU command (set target CPU address permanently)

Example 2:

Set the target address temporarily to CPU #2 in a multiprocessor configuration and display the general
purpose registers for this CPU.

HHC00013I Herc command: 'cpu 2 gpr'

HHC02269I General purpose registers

HHC02269I CP02: GR00=762DDDF8 GR01=00010016 GR02=00F52D28 GR03=0428E294

HHC02269I CP02: GR04=00FACD80 GR05=01175397 GR06=0428EF58 GR07=00F3C4B8

HHC02269I CP02: GR08=0428E268 GR09=81174398 GR10=0175F060 GR11=00FD12C0

HHC02269I CP02: GR12=03FCD790 GR13=0428E390 GR14=8101250C GR15=811744F4

Figure 81: CPU command (set target CPU address permanently)

8.38 CPUIDFMT (Display or set format BASIC /
0 / 1 STIDP generation)

8.38.1 Function

The CPUIDFMT command displays or sets the STORE CPU ID (STIDP) format bit. The default STIDP
format, if not explicitly set, is 'BASIC'. The format bit of the STIDP information specifies the format of the
first two digits of the CPU identification number. When the format bit is ‘0’ then the contents of the CPU
identification number identifies the CPU. When the format bit is ‘1’ then the CPU identification number
identifies the system configuration as opposed to an individual CPU in the configuration and it identifies
the logical partition in which the program is executed.


When the format is ‘BASIC’ the CPU identification number has the following hexadecimal format, where
'A' is the CPU address of the CPU.

x'Annnnn' (Basic Mode)

When the format is ‘0’ the CPU identification number has the following hexadecimal format where 'L' is a
logical CPU address and 'P' is a logical partition identifier.

x'LPnnnn' (LPAR mode)

When the format is ‘1’ the CPU identification number has the following hexadecimal format where 'PP' is
the user partition identifier (UPID). The UPID is an eight bit unsigned binary integer bound to a logical
partition.

x'PPnnnn' (LPAR mode)

In all cases n is a digit derived from the serial number of the CPU.

For more information on the STORE CPU ID (STIDP) instruction and the format bit see IBMs "z/Architec-
ture Principles of Operation" manual.

8.38.2 Syntax

Descriptive

Diagram

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