state, or an equipment error detected during the
execution of TEST I/O. The instruction TEST I/O cannot be used to clear a pending interruption condi­
tion due t.o the PCI flag while the subchannel is in
the working state.
Input/{)utput Instruction Exception
Handling
Before the channel is signaled to execute an I/O instruction, the instruction is tested for validity by
the CPU. Exceptional conditions detected at this
time cause a program interruption. When the inter­
ruption occurs, the current PSW is stored as the pro­
gram old PSW and is replaced by the program new PSW. The interruption code in the old PSW identi­
fies the cause of the interruption.
The following exception may cause a program
interruption:
Privileged Operation: An I/O instruction is encoun­
tered when the CPU is in the problem state. The
instruction is suppressed before the channel has been
signaled to execute it. The CSW, the condition code
in the PSW, and the state of the addressed sub chan­
nel and I/O device are not affected by the attempt
to execute an I/O instruction while in the problem
state.
Execution of Input/Output Operations The channel can execute six commands: write,
read, read backward, control, sense, and transfer in
channel. Each command except transfer in channel
initiates a corresponding I/O operation. The term "I/O operation" refers to the activity initiated by a
command in the I/O device and associated subchan­
nel. The subchannel is involved with the execution
of the operation from the initiation of the command
until the channel-end signal is received or, in the
case of command chaining, until the device-end sig­
nal is received. The operation in the device lasts until
device end occurs.
Blocking of Data
Data recorded by an I/O device may be divided into
blocks. The length of a block depends on the device;
for example, a block can be a card, a line of printing,
or the information recorded between two consecu­
tive gaps on magnetic tape.
The maximum amount of information that can be
transferred in one I/O operation is one block. An I/O operation is terminated when the associated
main storage area is exhausted or the end of the
block is reached, whichever occurs first. For some
operations, such as writing on a magnetic tape unit 210 Syste:m/370 Principles of Operation or at an inquiry station, blocks are not defined, and
the amount of information transferred is controlled
only by the program.
Channel Address Word
The channel address word ( CAW) specifies the stor­
age protection key and the address of the first CCW
associated with ST ART I/O or START I/O FAST RELEASE. The channel refers to the CAW only
during the execution of START I/O or START I/O FAST RELEASE. The CAW is fetched from real
location 72 of the CPU issuing the instruction. The
pertinent information thereafter is stored in the sub­
channel, and the program is free to change the con­
tents of the CAW. Fetching of the CAW by the
channel does not affect the contents of the location.
The CAW has the following format: I Key CCW Address
o 4 8
The fields in the CAW are allocated for the fol­
lowing purposes:
31
Protection Key: Bits 0-3 form the protection key for
all commands associated with ST ART I/O and ST ART I/O FAST RELEASE. This key is matched
with a key in storage whenever a reference is made
to main storage during an I/O operation.
CCW Address: Bits 8-31 designate the location of
the first CCW in absolute main storage.
Bit positions 4-7 of the CAW must contain zeros.
The three low-order bits of the command address
must bc zeros to specify the CCW on integral
boundaries for doublewords. If any of these restric­
tions is violated or if the CCW address specifies a
location protected against fetching or outside the
main storage of the particular installation, ST ART
II 0 and ST ART I/O FAST RELEASE cause the
status portion of the CSW to be stored with the pro­
tection check or program-check bit on. In this event,
the I/O operation is not initiated.
Programming Note
Bit positions 4-7 of the CAW, which presently must
contain zeros, may in the future be assigned for the
control of new functions. It is therefore recommend­
ed that these bit positions not be set to one for the
purpose of obtaining an intentional program-check
indication.

Channel Command Word
The channel command word (CCW) specifies the
command to be executed and, for commands initiat­
ing I/O operations, it designates the storage area
associated with the operation and the action to be
taken whenever transfer to or from the area is com­
pleted. The CCWs can be located anywhere in main
storage, and more than one can be associated with a
START I/O or START I/O FAST RELEASE.
The first CCW is fetched during the execution of
ST ART I/O or START I/O FAST RELEASE being
executed as START I/O. When START I/O FAST
RELEASE is executed independently of the device,
the first CCW is fetched subsequent to the execution
of START I/O FAST RELEASE. Each additional
CCW in the sequence is obtained when the opera­
tion has progressed to the point where the additional
CCW is needed. Fetching of the CCWs by the chan­
nel does not affect the contents of the location in
main storage.
The CCW has the following format:
Command
Code
o 8 I Flags 32 38 40 Data Address
48
31
Count
The fields in the CCW are allocated for the follow­
ing purposes: C()mmand Code: Bits 0-7 specify the operation to
be performed.
63
Data Address: Bits 8-31 specify the location of an
eight-bit byte in absolute main storage. It is the first
location referred to in the area designated by the
CCW.
Chain-Data (CD) Flag: Bit 32, when one, specifies
chaining of data. It causes the storage area designat­
ed by the next CCW to be used with the current
operation.
Chain-Command (CC) Flag: Bit 33, when one, and
when the CD flag is zero, specifies chaining of com­
mands. It causes the operation specified by the com­
mand code in the next CCW to be initiated on nor­
mal completion of the current operation.
Suppress-Length-Indication (SLI) Flag: Bit 34 con­
trols whether an incorrect-length condition is to be
indicated to the program. When this bit is one and
the CD flag is zero, the incorrect-length indication is
suppressed. When both the CC and SLI flags are
one, command chaining takes place regardless of the
presence of an incorrect-length condition.
Skip (SKIP) Flag: Bit 35, when one, specifies sup­
pression of transfer of information to storage during
a read, read backward, or sense operation.
Program-Controlled-Interruption (PCI) Flag: Bit
36, when one, causes the channel to generate an
interruption condition when the CCW takes control
of the channel. When bit 36 is zero, normal opera­
tion takes place.
Indirect Data Address (IDA) Flag: Bit 37, when
one, specifies indirect data addressing. (The flag is
valid in both BC and EC modes.)
Count: Bits 48-63 specify the number of eight-bit
byte locations in the storage area designated by the
CCW.
Bit positions 38-39 of every CCW other than one
specifying transfer in channel must contain zeros.
Additionally, if indirect addressing is specified, bits 30-31 of the CCW must be zeros, indicating a word
boundary, and bits 0-7 of the first entry of the indi­
rect data address list must be zeros. (See "Channel
Indirect Data Addressing.") Otherwise, a program­
check condition is generated. When the first CCW
designated by the CAW does not contain the re­
quired zeros, the I/O operation is not initiated, and
the status portion of the CSW with the program­
check indication is stored during execution of
ST ART I/O or, if being executed as START I/O, ST ART I/O FAST RELEASE. Detection of this
condition during data chaining causes the I/O device
to be signaled to conclude the operation. When the
absence of these zeros is detected during command
chaining or subsequent to the execution of START I/O FAST RELEASE, the new operation is not
initiated, and an interruption condition is generated.
The contents of bit positions 40-47 of the CCW
are ignored.
Programming Note
Bit positions 38-39 of the CCW, which presently
must contain zeros, may in the future be assigned for
the control of new functions. It is therefore recom­
mended that these bit positions not be set to one for
the purpose of obtaining a program-check indication. Input/Output Operations 21 t