After the instruction is executed, register 5 contains 00 00 00 17 = 23 1 0 • AND (N, rJR, NI, NC)
When the lBoolean operator AND is applied to two bits, the
result is one when both bits are one; otherwise, the result
is zero. When two bytes are ANDed in System/370, each
pair of bits is handled separately; there is no connection
from one bit position to another. AND(NI) A frequent use of the AND instruction is to set a particular
bit to zero. For example, assume that storage location 4891
contains 0100 0011
2
, To set the rightmost bit of this byte
to zero without affectirig the other bits, the following
instruction can be used (assume that register 8 contains 00 00 48 90): Machine Format Op Code B1
°1
94 FE 8 001 Assembler Format Op Code 0, (B
1
), 12 NI 1 (8). X'FE'
When this instruction is executed, the byte in storage is
ANDed with the immediate byte:
Location 4891 0100 00112 Immediate byte 1111 11102
Result: 0100 00102 The resulting byte, with bit 7 set to zero, is stored in
location 4891. Condition code 2 is set.
Branch and link (BAL, BALR)
The BRANCH AND LINK instructions are commonly used
to branch to a subroutine with the option of later returning
to the main instruction sequence. For example, assume that
you wish to branch to a subroutine at storage address 1160. Also assume:
The contents of register 2 are not significant.
Register 5 <:ontains 00 00 11 50. Address 00 00 C6 contains a aAL instruction. (pSW bits 40-63
will contain 00 00 CA after of BAL)
The format of the BAL iristruction is:
Machine Format Op Code R1 X
2
B2 Assembler Format Op Code R
1
, 02 (X
2
, B
2
)
BAL 2,X'10'(O,5) 292 System/370 Principles of Operation
After the instruction is executed:
Register 2 (bits 8-31) contains 00 00 CA PSW bits 40-63 contain 00 11 60 The programmer can return to the main instruction se­ quence at any time with a BRANCH ON CONDITION (BCR)
instruction that specifies register 2 and a mask of 15
1 0 , pro­ vided that register 2 has not meanwhile been disturbed.
The BALR instruction with the R2 field equal to zero may
be used to load a register for use as a base register. For
example, in the assembly language the sequence of statements:
BALR 15,0 USING *,15
tells the assembly program that register 15 is to be used as
the base register in assembling this program and that when
the program is executed, the address of the next sequential
instruction following the BALR will be placed in the regis­ ter. (The USING statement is an assembler instruction and
is thus not a part of the object program.)
At any time, the condition code may be preserved for
future inspection with BALR 1,0. Bits 2 and 3 of the regis­ ter (Rl) contain the condition code.
Branch on Condition (BC, BCR)
The BRANCH ON CONDITION instructions test the condi­ tion code to see whether a branch should or should not be
taken. The branch is taken only if the condition code is as
specified by a mask.
Mask Condition
Value Code 8 0 4 1
2 2
1 3
For example, assume that an ADD (A, AR) operation has
been performed and you wish to branch to address 6050 if
the sum is zero or less (condition code = 0 or 1). Also
assume:
Register 10 contains 00 00 50 00 Register 11 contains 00 00 10 00 The RX form of the instruction performs the required
test (and branch, if necessary) when written as:
Machine Format Op Code M1 X
2
B2 02 I L- _4_7 -..1.-1 Assembler Format Op Code M
1
, 02 (X
2
, B
2
)
BC 12,X'50'( 11,1 0) A mask of 15 indicates a branch on any condition (an
unconditional branCh). A mask of zero indicates that no
branch is to occur (a no-operation).

Branch on Count (BCT, BCTR)
The BRANCH ON COUNT instructions are often used to
execute a program loop for a specified number of times.
For example, assume that the following represents some lines
of coding in an assembly-language program: LUPE AR8,!
BACK BCT 6,LUPE where register 6 contains 00 00 00 03 and the address of LUPE is 6826. Assume that, in order to address this loca­ tion, register lOis used as a base register and contains 00 00 68 00. The format of the BCT instruction is:
Machine Format
46 I 6 I 0 I A 026 Assembler Format Op Code R
1
, D2 (X
2
, B
2
)
BCT 6,X'26'(O,10) The effect of the coding is to execute three times the loop
defined by locations LUPE through BACK.
Branch on Index High (BXH)
The BRANCH ON INDEX HIGH instruction is an index­ incrementing and loop-controlling instruction that causes a
branch whenever the sum of an index value and an increment
value is greater than some comparand. For example, assume
that:
Register 4 contains 00 00 00 8A = 13810 = the index
Register 6 contains 00 00 00 02 = 2
1
0 = the increment
Register 7 contains 00 00 00 AA = 17010 = the comparand
Register 10 contains 00 00 71 30 = the branch address
The format of the instruction is:
Machine Format
86 I 4 I 6 I A 000 Assembler Format Op Code R
1
, R
3
, D2 (B
2
)
BXH 4,6,0(10) When the instruction is executed: first, the contents of
register 6 are added to register 4; second, the sum is com­ pared with the contents of register 7; and third, the deci­ sion to branch is made. After execution:
Register 4 contains 00 00 00 8C=140 10 Registers 6 and 7 are unchanged
Since the new value in register 4 is not greater than the
value in register 7, the branch to address 7130 is not taken.
When the register used to contain the increment is odd,
that register also becomes the comparand register. The fol­ lowing assembly-language routine illustrates how this fea­ me may be used to search a table:
Table
Two Bytes Two Bytes
ARG1 FUNCT1
ARG2 FUNCT2
ARG3 FUNCT3
ARG4 FUNCT4
ARG5 FUNCT5
ARG6 FUNCT6
Assume that:
Register 0 contains the search argument
Register 1 contains the width of the table in bytes (00 00 00 04) Register 2 contains the length of the table in bytes (00 00 00 18)
Register 3 contains the starting address of the table
Register 14 contains the return address to the main program
As the following subroutine is executed, the argument in
register 0 is successively compared with the arguments in
the table, starting with argument 6 and working backwards
to argument 1. If an equality is found, the corresponding
function replaces the argument in register O. If an equality
is not found, FF 16 replaces the argument in register O. The first instruction (LNR) causes the value in register 1
to be made negative. After execution of this instruction,
register 1 contains FFFFFFFC = -4 10 , Considering the
case when no equality is found, the BXH instruction will
be executed seven times. Each time the BXH is executed,
a value of -- 4 is added to register 2, thus reducing the
value in register 2 by 4. The new value in register 2 is com­ pared with the -4 value in register l. Thus the branch is
taken each time until the value in register 2 is -4.
SEARCH LNR 1, 1 NOTEQUAL BXH 2,1, LOOP NOTFOUND LA 0, X'FF'
BCR 15, 14 LOOP CH 0,0(2,3) BC 7, NOTEQUAL LH 0,2 (2,3)
BCR 15,14
Branch on I ndex low or Equal (BXlE)
This instruction is similar to BRANCH ON INDEX HIGH
except that the branch is successful when the sum is low
or equal compared to the comparand.
Appendix I. Number Representation and Instruction-Use Examples 293