When this instruction is executed, the byte in storage is ORed with the immediate byte:
Location 4891: 0100 00102 Immediate byte: 0000 0001 2 Result: 0100 00112 The resulting byte with bit 7 set to one is stored in location
4891. Condition code 1 is set.
Pack (PACK) Assume that storage locations 1000-1004 contain the fol­
lowing zoned-decimal field that is to be converted to a
packed-decimal field and left in the same location: 1000 1004 Zoned Field I F1 I F21 F3 I F41 C5 I Also assume that register 12 contains 00 001000. After
the instruction
Machine Format ___ 00_0 __ ___ Assembler Format
PACK 10(5,12) ,0(5,12)
is executed!, the field in locations 1000-1004 is in the
packed-decimal format: 1000 1004 Packed Field 1 00 1 00 112 1 34 1 5C 1 Notes:
1. This example illustrates the operation of PACK when the
first- and second-operand fields overlap completely.
2. During the operation, the second operand was extended
with high-order zeros.
Shift Left Double (SLDA)
The SHIFT LEFT DOUBLE instruction is similar to SHIFT
LEFT SINGLE except that SLDA shifts the 63 bits (not
including the sign) of an even/odd register pair. The R 1 field
of this instruction must be even. For example, if the con­
tents of registers 2 and 3 are: 00 7F OA 72 FE DC BA 98 = 0000 0000 0111 1111 0000 1010 0111 0010 1111 1110 1101 1100 1011 1010 1001 1000 2 the instruc tion
Machine Format
01F 302 System/370 Principles of Operation
Assembler Format Op Code R
1
, 02 (8
2
) SLOA 2,31(0)
results in registers 2 and 3 both being left-shifted 31 bit po­
sitions, so that their new contents are:
7 F 6E 5 D 4C 00 00 00 00 = 0111 1111 0110 1110 0101 1101 0100 1100 0000 0000 0000 0000 0000 0000 0000 0000 2 In this case, a significant bit is shifted out of position 1, and
a fixed-point overflow interruption occurs (unless PSW bit
36 equals zero).
Shift Left Single (SLA)
Because the sign bit remains unchanged during an SLA op­
eration, this instruction performs an algebraic shift. For
example, if the contents of register 2 are: 00 7F OA 72 = 0000 0000 0111 1111 0000 1010 0111 0010 2 then the instruction
Machine Format 008 Assembler Format Op Code R
1
, 02 (82) SLA 2,8(0)
results in register 2 being shifted left eight bit positions so
that its new contents are:
7F OA 72 00 = 0111 1111 0000 1010 0111 0010 0000 0000 2 If a left shift of nine places had been specified, a significant
bit would have been shifted out of position 1, and a fixed­
point overflow interruption might have occurred (unless PSW bit 36 equaled zero).
Note that register 0 does not participate in the operation
and that the contents of the R3 field are ignored.
Store Multiple (STM)
Assume that the contents of general registers 14, 15, 0, and
1 are to be stored in consecutive words starting with loca­
tion 4050 and that:
Register 14 contains 00 00 25 63
Register 15 contains 00 01 27 36
Register 0 contains 12 43 00 62
Register 1 contains 73 26 12 57
Register 6 contains 00 00 40 00 The initial contents of locations 4050405 F are not significant
The STORE MULTIPLE instruction allows the use of just
one instruction to store the contents of the four registers
when it is written as:

Machine Format 90 I E I 1 I 6 050 Assembler Format Op Code R
1
, R
3
, 02 (B2) STM 14,1,X'50'(6)
After the instruction is executed:
Locations 40504053 contain 00 00 25 63
Locations 40544057 contain 00 01 27 36
Locations 4058405B contain 12 43 00 62
Locations 405C405F contain 73 26 12 57
Test Under Mask (TM)
The TEST UNDER MASK instruction examines specific bits
within a byte and sets the condition code according to what
it finds. For example, assume that:
Storage location 9999 contains FB
Register 9 contains 000099 90 Execution of the instruction
Machine Format Op Code '2
91 C3 Assembler Format Op Code 01 (B
1
), '2
TM 9(9) ,X'C3' 009 produces the following result:
FB 1111 1011 2 Mask (C3) 1100 00112 Result llxx XX112 Condition code 3 is set: all selected bits are ones.
I[location 9999 had contained B9, the result would have
been:
B9
Mask (C3)
Result 1011 10012 1100 00112 10xx xx012 Condition code 1 is set: the selected bits are both zeros and
ones.
If location 9999 had contained 3C, the result would have
been:
3C
Mask (C3)
Result 0011 11002 1100 00112 OOxx XX002 Condition code 0 is set; all selected bits are zeros.
Note: Storage location 9999 remains unchanged. Translate (TR)
With the TRANSLATE instruction, System/370 can trans­
late data from any code to any other desired code, provided
that each coded character consists of eight bits or fewer. In
the following example EBCDIC is translated to ASCII. The
first step is to create a 256-byte table in storage locations 1000-10FF. This table contains the characters of the code
into which you are translating (the function bytes). The
table must be in order, not by the binary values of the char­
acters it contains, but by the binary sequence of the charac­ ters of the original code (the argument bytes). For example,
note in the following table that the characters are in the
normal EBCDIC collating sequence.
Translate Table: 100F 1000 1010 1020 - - --- -- -'- 1030 -- -- - - f---- -- - 1040 b + ---1--- ----- I-- ... -- - -- 1050 & $ * - -- -".- -- -- - -- -- .- 1060 / %
- - ,- 1070 #
@
- - -
--- -f.-- 1080 ! b .£ d e !! h
- - - - 1--- - - - --- 1090 j k m n 0 .r: - -- - f--.--- --f-- -- 10AO u v w
x y z .- .-- 10BO --.-- --_.- - - -- ---,-- lOCO A B C D
E F G H , - - - - --- (= 1000 J K L M N 0 P Q R - 10EO S T U
V W X Y Z -
-- 10FO 0 1 2 3 4 5 6 7 8 9 -1-- - 10FF Notes:
1. The underscores are used to indicate the ASCII representations
of the EBCDIC characters shown.
2. I f the character codes in the statement being translated occupy
a range smaller than 00 through FF 16. a table of fewer than 256
bytes can be used.
Now, assume that starting at storage location 2100 there
is a sequence of 20
1 0 EBCDIC characters to be translated to ASCII: Locations 2100-2113: JOHNbJONESb257bW.b95
Also assume:
Register 12 contains 00 00 21 00 Register 15 contains 00 00 10 00 Appendix I. Number Representation and Instruction-Use Examples 303