Tennimlltion Due to Equipment Malfunction
When channel equipment malfunctioning is detected
or invalid signals are received over the I/O interface,
the recovery procedure and the subsequent states of
the subehannels and devices on the channel depend
on the type of error and on the model. Normally, the
program is alerted to the termination by an I/O in­
terruption, and the associated CSW indicates the
channel-control-check or interface-control-check
condition. In channels sharing common equipment
with the CPU, malfunctioning detected by the chan­
nel may be indicated by a machine-check interrup­
tion, in which case no CSW is stored. Equipment
malfunctioning may cause the channel to perform
the I/O·-selective-reset or I/O-system-reset function
or to generate the halt signal.
Input/Output Interruptions
Input/ output interruptions provide a means for the CPU to change its state in response to conditions
that occur in I/O devices or channels. These condi­
tions can be caused by the program or by an external
event at the device.
Interruption Conditions
The conditions causing requests for I/O interrup­
tions to be initiated are called I/O interruption con­
ditions. An I/O interruption condition can be
brought to the attention of the program only once
and is cleared when it causes an interruption. Alter­
natively, an I/O interruption condition can be
cleared by TEST I/O or CLEAR I/O, and condi­
tions gellerated by the I/O device following the ter­
mination of the operation at the subchannel can be
cleared by ST ART I/O or START I/O FAST RE­
LEASE. The latter include the attention, device­
end, and control-unit-end conditions, and the channel-end condition when provided by a device
after concluding of the operation.
The device attempts to initiate a request to the
channel for an interruption whenever it detects any
of the folllowing conditions:
Channel end
Control-unit end
Device end
Attention
The channel may also, at command chaining, cre­
ate an interruption condition at the device, which
can be due to the following conditions: Unit check
Unit exception
Busy indication from device Program check
Protection check
226 System/370 Principles of Operation
When an operation initiated by command chain­
ing is terminated because of an unusual condition
detected during the command initiation sequence,
the interruption condition may remain pending with­
in the channel, or the channel may create an inter­
ruption condition at the device. An interruption
condition is created at the device in response to
presentation of status by the device and causes the
device subsequently to present the same status for
interruption purposes. The interruption condition at
the device mayor may not be associated with unit
status. If the unusual condition is detected by the
device (unit check or unit exception) the unit-status
field of the associated CSW identifies the condition.
In the case of program and protection check, the
identification of the error condition is preserved in
the subchannel, and appears in the channel-status
field of the associated CSW. If the associated inter­
ruption condition has been queued at the device, the
device provides zero status for interruption purposes.
When command chaining takes place, channel end
and device end do not cause an interruption, and are
not made available.
An interruption condition caused by the device
may be accompanied by channel and other unit sta­
tus conditions. Furthermore, more than one inter­
ruption condition associated with the same device
can be cleared at the same time. As an example,
when the channel-end condition is not cleared at the
device by the time device end is generated, both
conditions may be indicated in the CSW and cleared
at the device concurrently.
However, at the time the channel assigns highest
priority for interruptions to a condition associated
with an operation at the subchannel, the channel
accepts the status from the device and clears the
condition at the device. The interruption condition
and the associated status indication are subsequently
preserved in the subchannel. Any subsequent status
generated by the device is not included with the con­
dition at the sub channel, even if the status is gener­
ated before the CPU accepts the condition.
The method of processing a request for interrup­
tion due to equipment malfunctioning depends on
the model. In channels sharing common equipment
with the CPU, malfunctioning detected by the chan­
nel may be indicated by causing a machine-check
interruption.
When the channel detects any of the following
conditions, it initiates a request for an I/O interrup­
tion without necessarily communicating with or hav­
ing received the status byte from the device: • PCI flag in a CCW • Execution of HALT I/O or HALT DEVICE on
a selector channel

• Channel available interruption (CAl) • A programming error associated with the CCW
or first IDA W following the SIOF function
The interruption conditions from the channel,
except for CAl, can be accompanied by other chan­
nel status indications, but none of the device status
bits is on when the channel initiates the interruption.
The channel available interruption (CAl) condi­
tion is provided on all block-multiplexer channels
and causes the entire CSW to be replaced by a new
set of bits. All fields of the CSW are set to zero.
The I/O address stored in the I/O old PSW in BC
mode and in the I/O communications area in EC
mode contains a zero device address and a channel
address identifying the interrupting channel.
The channel generates the CAl condition only if
it previously had responded with a condition code 2
to an I/O instruction other than HALT I/O or
HALT DEVICE and if the busy condition thus indi­
cated no longer exists. When the busy condition
which caused condition code 2 was due to a subchan­
nel busy with a device other than the one addressed,
the concluding of the busy condition is not signaled
by a CAl. Since any other interruption condition
(except PCI) accomplishes the same function as
CAl, a pending CAl condition is reset upon the oc­
currence of any interruption (except PCI) on that
channel. Some channels also reset a pending CAl
condition when another interruption condition
(except PCI) is cleared by a TEST I/O on the same
channel. The occurrence of another channel-busy
condition prior to the CAl causes the CAl condition
to be suspended until the busy condition is past.
Programming Note
The CAl is designed to inform the program that a
channel which previously indicated busy is no longer
busy. The CAl condition pending in a channel does
not cause the rejection of a subsequent START I/O or START I/O FAST RELEASE but does cause a
condition code 1 to be returned to TEST CHAN­
NEL. The CAl can therefore be used as a tool for
keeping I/O requests in sequence by using it in con­
junction with TEST CHANNEL. A channel which
responded with condition code 2 because of a chan­
nel busy condition does not subsequently respond
with a condition code 0 to a TEST CHANNEL with­
out clearing an interruption condition in the interim.
Priority of Interruptions
All requests for I/O interruption are asynchronous
to the activity in the CPU, and interruption condi­
tions associated with more than one I/O device can
exist at the same time. The priority among requests Page of GA22-7000-4
Revised September 1, 1975
By TNL: GN22-0498
is controlled by two types of mechanisms--one es­ the priority among interruption conditions
associated with devices attached to the same chan­
nel, and another establishes priority among requests
from different channels. A channel requests an I/O interruption only after it has established priority
among requests from its devices. The conditions
responsible for the requests are preserved in the
devices or channels until accepted by the CPU. Assignment of priority to requests for interruption
associated with devices on anyone channel is a
function of the type of channel, the type of interrup­
tion condition, and the position of the device on the I/O interface. A device's position on the interface is
not related to its The selector channel assigns the highest priority
to conditions associated with the portion of the op­
eration in which the channel is involved. These con­
ditions include channel end, program-controlled­
interruption, HALT I/O or HALT DEVICE in the
channel, and errors prematurely concluding a chain
of operations. The selector channel cannot handle
any interruption conditions other than those due to the PCI flag while operation is in progress.
As soon as the selector channel has cleared the
interruption conditions associated with data transfer
it starts monitoring devices for attention, control­
unit-end, and device-end conditions and for the chan­
nel-end condition associated with operations con­
cluded by HALT I/O, HALT DEVICE, or CLEAR I/O. The highest priority is assigned to the I/O device that first identifies itself on the interface. On the byte-multiplexer channel the priority
among requests for interruption is based on response
from devices. The highest priority is assigned to the
device that first identifies itself with an interruption
condition or that requests service for data transfer
and contains the PCI condition in the subchannel.
The assignment of priority among interruption
conditions for a block-multiplexer channel differs
among models. Some block-multiplexer channels
assign priorities as done by the byte-multiplexer
channel. Others assign priorities in a manner which
appears random.
Except for conditions associated with concluding
of data transfer, the current assignment of priority
for interruption among devices on a channel may be
canceled when START I/O, START I/O FAST RELEASE,.TEST I/O, CLEAR I/O, HALT I/O, or HALT DEVICE is issued to the channel. When­
ever the assignment is canceled, the channel resumes
monitoring for interruption conditions and reassigns
the priority on completion of the activity associated
with the I/O instruction.
Input/Output Operations 227