The second operand is subtracted from the first oper­
and, and the difference is placed in the first-
operand location. The occurrence of a carry out of
the sign position is recorded in the condition code.
Logical subtraction is considered to be performed
by adding the one's complement of the second oper­
and and a low-order one to the first operand. All 32
bits of both operands participate, without further
change to the resulting sign bit. The instruction dif­
fers from SUBTRACT in the meaning of the condi­
tion code and in the absence of the interruption for
overflow.
If a carry out of the sign position occurs, the left­
most bit of the condition code is made one. In the
absence of a carry, the bit is made zero. When the
sum is zero, the rightmost bit of the condition code
is made zero. For a nonzero sum, the bit is made
one. Resulting Condition Code:
o -
1 Difference is not zero, with no carry
2 Difference is zero, with carry
3 Difference is not zero, with carry
Program Exceptions:
Access (fetch, operand 2 of SL only)
Programming Note
The use of the one's complement and the low-order
one instead of the two's complement of the second
operand results in the recognition of carry when
subtracting zero or the maximum negative number.
A zero difference cannot be obtained without a car­
ry out of the sign position. Superl'isor Call SVC [RR]
o 8 15
The instruction causes a supervisor-call interruption,
with the I field of the instruction providing the inter­
ruption Icode. The contents of bit positions 8-15 of the instruc­
tion, with eight high-order zeros appended, are
placed in the supervisor-call interruption code that is
stored in the course of the interruption. The old PSW is stored at location 32, and a new PSW is ob­
tained from location 96. The instruction is valid in
both the problem and supervisor states.
144 System/370 Principles of Operation Condition Code:
The code remains unchanged in the old PSW. Program Exceptions:
None
Test and Set TS [S] The leftmost bit (bit position 0) of the byte located
at the second-operand address is used to set the con­ I dition code, and then the entire addressed byte is set
to all ones. Bits 8-15 of the instruction are ignored.
The byte in storage is set to all ones as it is
fetched for the testing of bit position O. No access by
another CPU is permitted to this location between
the moment of fetching and the moment of storing
all ones.
A serialization function is performed before the
byte is fetched and again after the storing of all
ones. CPU operation is delayed until all previous
accesses by this CPU to main storage have been
completed, as observed by channels and other CPUs, and then the byte is fetched. No subsequent
instructions or their operands are accessed by this CPU until the all-ones value has been placed in main
storage, as observed by channels and other CPUs. Resulting Condition Code:
o Leftmost bit of byte specified is zero
1 Leftmost bit of byte specified is one
2 -
3 -
Program Exceptions:
Access (fetch and store, operand 2)
Programming Note TEST AND SET can be used for controlled sharing
of a common storage area by more than one pro­
gram. To accomplish this, bit position 0 of a byte
must be designated as the control bit. The desired
interlock can be achieved by establishing a program
convention in which a zero in the bit position indi­
cates that the common area is available but a one
means that the area is being used. Each using pro­
gram then must examine this byte by means of TEST AND SET before making access to the com­
mon area. If the test sets condition code 0, the area
is available for use; if it sets condition code 1, the

area cannot be used. Because TEST AND SET per­
mits no other CPU access to the test byte between
the moment of fetching (for testing) and the mo­
ment of storing all ones (setting), the possibility is
eliminated of a second program's testing the byte
before the first program is able to set it.
It should-be noted that TEST AND SET does not
interlock against storage accesses by channels.
Test Under Mask
TM lSI] 91 D1
o 8 16 20 31
The stat6Jt)f the first-operand bits selected by a mask
is used to set the condition code.
The byte of immediate data, 12, is used as an
eight-bit mask. The bits of the mask are made to
correspond one for one with the bits of the character
in storage specified by the first-operand address.
A mask bit of one indicates that the storage bit is
to be tested. When the mask bit is ,zero, the storage
bit is ignored. When all storage bits thus selected
are zero, the condition code is made O. The code is
also made 0 when the mask is all zeros. When the
selected bits are all ones, the code is made 3; other­
wise, the code is made 1. The character in storage is
not changed.
Access exceptions associated with the storage
operand are recognized for one byte, even when the
mask is all zeros.
Resulting Condition Code:
o Selected bits all zeros; or the mask is all zeros
1 Selected bits mixed zeros and ones
2 -
3 Selected bits all ones
Program Exceptions:
Access (fetch, operand 1)
Translate
[SS]
The eight-bit bytes of the first operand are used as
arguments to reference the list designated by the
second-operand address. Each eight-bit function
byte selected from the list replaces the correspond­
ing argument in the first operand.
The L field applies only to the first operand.
The bytes of the first operand are selected one by
one for translation, proceeding left to right. Each
argument byte is added to the initial second-operand
address. The addition is performed following the
rules for address arithmetic, with the argument byte
treated as an eight-bit unsigned integer and extended
with high-order zeros. The sum is used as the ad­
dress of the function byte, which then replaces the
original argument byte.
The operation proceeds until the first-operand
field is exhausted. The list is not altered unless an
overlap occurs.
When the operands overlap, the result is obtained
as if each result byte were stored immediately after
the corresponding function byte is fetched.
Condition Code:
The code remains unchanged.
Program Exceptions:
Access (fetch, operand 2; fetch and store, oper­
and 1) PTogranumrnng The instruction TRANSLATE may be used to con­
vert data from one code to another code.
Another purpose for which the instruction may be
used is to rearrange data. This may be accomplished
by placing a pattern in the destination area, by desig­
nating the pattern as the first operand of TRANS­
LATE, and by designating the data that is to be re­
arranged as the second operand. Each byte of the
pattern contains an eight-bit number specifying the
byte destined for this position. Thus, when the in­
struction is executed, the pattern selects the bytes of
the second operand in the desired order.
Because the eight-bit argument byte is added to
the initial second-operand address to obtain the ad­
dress of a function byte, the list may contain 256
bytes. In cases where it is known that not all eight­
bit argument values will occur, it is possible to re­
duce the size of the list.
The fetch and subsequent store accesses to a par­
ticular byte in the first-operand field do not neces­
sarily occur one immediately after the other.
Translate and Test Lo-.-D---LD _L-----'----1-..fB, I 8 16 20 32 36 47 o
General Instructions 145