to have as many digits as necessary for the comple­
tion of the operation.
The operand fields in decimal instructions, other
than EDIT and EDIT AND MARK, should not ov­
erlap at all or should have coincident rightmost
bytes. In ZERO AND ADD, the field may also over­
lap in such a manner that the rightmost byte of the
first operand is to the right of the rightmost byte of
the second operand. For these cases of proper over­
lap, the result is obtained as if operands were pro­
cessed right to left. Because the code configurations
for digits and signs are verified during the perform­
ance of the arithmetic, improperly overlapping fields
are recognized as data exceptions. In editing, over­
lapping operands yield unpredictable results.
During the execution of a decimal instruction, all
bytes of the operands are not necessarily accessed
concurrently, and the fetch and store accesses to a
single location do not necessarily occur one immedi­
ately after the other. Furthermore, for decimal in­
structions, intermediate values may be placed in the
result field that may differ from the original operand
and final result values. Thus, an instruction such as
ADD DECIMAL cannot be safely used to update a
shared location in main storage when the possibility
exists that another CPU may also be updating that
location.
Number Representation Packed dedmal numbers are represented as right­
aligned true integers with a plus or minus sign.
The digits 0-9 have the binary encoding 0000- 1 001. The codes 1010-1111 are invalid as digit
Name Mnemonic
ADD DECIMAL AP S5 COMPARE DECIMAL CP SS DIVIDE DECIMAL DP SS EDIT ED SS EDIT AND MARK EDMK SS MULTIPLY DECIMAL MP SS SHIFT AND ROUND DECIMAL SRP SS SUBTRACT DECIMAL SP SS ZERO AND ADD ZAP SS Explanation: A Access exceptions
C
Condition code is set
o Data Elxception OF Decimal-overflow exception OK Decimal-divide exception
Decimal Instruction Summary
148 System/370 Principles of Operation C
C
C
C
C
C
C
codes and are interpreted as sign codes, with 1010, 1100, 1110, and 1111 recognized as plus and with 1011 and 1101 recognized as minus. The codes 0000-1001 are invalid as sign codes. A data excep­
tion is recognized when an invalid code is detected.
The operation is terminated, except when the sign
position contains an invalid sign code, in which case
the operation is suppressed.
Although alternate encoding of the sign in an
operand is accepted, the preferred sign codes are
always generated for the results of decimal arithme­
tic and shifting operations (for the first-operand field
of ADD DECIMAL, DIVIDE DECIMAL, MULTI­ PLY DECIMAL, SHIFT AND ROUND DECI­
MAL, SUBTRACT DECIMAL, and ZERO AND
ADD). These codes are plus, 1100, and minus, 1101. They are provided even when the operand
value is otherwise unchanged, such as when adding
zero to a number or when shifting the field by a zero
amount. The editing instruction, as well as UN­ PACK, generates the zone code 1111.
Instructions
The decimal instructions and their mnemonics, for­
mats, and operation codes are listed in the following
table. The table also indicates when the condition
code is set and the exceptions in operand designa­
tions, data, or results that cause a program interrup­
tion. Note: In the detailed descriptions of the individual
instructions, the mnemonic and the symbolic oper­
and designation for the IBM System/370 assembly
language are shown with each instruction. For ADD
DECIMAL, for example, AP is the mnemonic and
Characteristics Code PO A 0 OF ST FA PO A 0 F9 PO A SP 0 OK ST FD PO A 0 ST DE PO A 0 R ST OF PO A SP 0 ST FC PO A 0 OF ST FO PO A 0 OF ST FB PO A 0 OF ST Fa PO Decimal feature
R
PER general register alteration event SP Specification exception SS SS instruction format ST PER storage alteration event

Programming Note
The moving and logical comparing instructions may
also be used in decimal calculations.
Add Decimal AP [SS] L---I F __ A --L-L1 --L--L2 --'---,IB1 I o 8 1 2 16 20 32 36 47
The secood operand is added to the first operand,
and the sum is placed in the first-operand location.
Addition is algebraic, taking into account the
signs and all digits of both operands. All sign and
digit codes are checked for validity. If necessary,
high-order zeros are supplied for either operand.
When the first-operand field is too short to contain
all significant digits of the sum, a decimal overflow
occurs, and a program interruption is taken, provid­
ed that the decimal-overflow mask bit is one.
Overflow has two possible causes. The first is the
loss of a carry out of the high-order digit position of
the result field. The second cause is an oversized
result, which occurs when the second-operand field
is larger than the first-operand field and significant
result digits are lost. The field sizes alone are not an
indication of overflow.
The first-operand and second-operand fields may
overlap when their low-order bytes coincide; there­
fore, it is possible to add a number to itself.
The sign of the sum is determined by the rules of
algebra. When the operation is completed without an
overflow, a zero sum has a positive sign, but when
high-order digits are lost because of an overflow, a
zero sum may be either positive or negative, as de­
termined by what the sign of the correct sum would
have been.
Resulting Condition Code:
o Sum is zero
1 Sum is less than zero
2 Sum is greater than zero
3 Overflow
Program Exceptions:
Operation (if the decimal feature is not installed)
Access (fetch, operand 2; fetch and store, oper­
and 1)
Data
Decimal Overflow
Compare Decimal
The first operand is compared with the second, and
the condition code indicates the comparison result.
Comparison is algebraic, taking into account the
sign and all digits of both operands. All sign and
digit codes are checked for validity, and any valid
plus or minus sign is considered equal to any other
valid plus or minus sign, respectively. If the fields are
unequal in length, the shorter is extended with high­
order zeros. A field with a zero value and positive
sign is considered equal to a field with a zero value
but negative sign. Neither operand is changed as a
result of the operation. Overflow cannot occur in
this operation.
The first-operand and second-operand fields may
overlap when their low-order bytes coincide. It is
possible, therefore, to compare a number with itself.
Resulting Condition Code:
o Operands equal
1 First operand is low
2 First operand is high
3 -
Program Exceptions: , Operation (if the decimal feature is not installed)
Access (fetch, operands 1 and 2)
Data
Divide Decimal DP I o
The dividend (the first operand) is divided by the
divisor (the second operand) and replaced by the
quotient and remainder.
The quotient field is placed leftmost in the first­
operand field. The remainder field is placed right­
most in the first-operand field and has a size equal to
the divisor size. Together, the quotient and remain­
der occupy the entire dividend field; therefore, the
address of the quotient field is the address of the
first operand. The size of the quotient field in eight­
bit bytes is Lt-L2, and the length code for this field
is one less (L t -L2-1 ). When the divisor length code
is larger than seven (15 digits and sign) or larger
Decimal Instructions 149