The CPU program initiates I/O operations with
the instruction START I/O or START I/O FAST RELEASE. These instructions identify the channel
and device and cause the channel to fetch the chan­
nel address word ( CAW) from a fixed location in
main storage. The CAW contains the protection key
and designates the location in main storage from
which the channel subsequently fetches the first
CCW. The CCW specifies the command to be execu­
ted and the storage area, if any, to be used. When the CAW has been fetched, some channels
consider the execution of START I/O FAST RE­ LEASE complete. The results of the execution of
the instruction to that point are indicated by setting
the condition code in the program status word (PSW) and, under certain conditions, by storing
pertinent information in the channel status word (CSW). If the channel is not operating in burst mode and
if the sub channel associated with the addressed I/O device is available, the channel attempts to select the
device by sending the address of the device to all
controll units attached to the channel. A control unit
that reGognizes the address connects itself logically
to the channel and responds to its selection by re­
turning the address of the selected device. The chan­
nel subsequently sends the command code part of
the CCW over the interface, and the device responds
with a status byte indicating whether it can execute
the command.
At this time, the execution of START I/O and of ST ART I/O FAST RELEASE, if not previously
considered complete, is completed. The results of
the attempt to initiate the execution of the command
are indicated by setting the condition code in the PSW and, under certain conditions, by storing perti­
nent information in the CSW. If the operation is initiated at the device and its
execution involves transfer of data, the subchannel is
set up to respond to service requests from the device
and assumes further control of the operation. In the
case of operations that do not require any data to be
transferred to or from the device, the device may
signal the end of the operation immediately on re­
ceipt of the command code.
An ][/0 operation may involve transfer of data to
one storage area, designated by a single CCW, or to
a number of noncontiguous storage areas. In the
latter case, generally a list of CCWs is used for exe­
cution of the I/O operation, each CCW designating a
contiguous storage area, and the CCWs are said to
be coupled by data chaining. Data chaining is speci­
fied by a flag in the CCW and causes the channel to
fetch another CCW upon the exhaustion or filling of
the storage area designated by the current CCW. 190 System/370 Principles of Operation
The storage area designated by a CCW fetched on
data chaining pertains to theU 0 operation already
in progress at the I/O device, and the I/O device is
not notified when a new CCW is fetched. Provision
is made in the CCW format for the programmer to
specify that, when the CCW is decoded, the channel
request an I/O interruption as soon as possible,
thereby notifying the CPU program that chaining
has progressed to a particular CCW in the channel
program.
To complement the dynamic address translation
facility available in the CPU, which can make data
stored in more than one noncontiguous page of main
storage appear as one storage area, channel indirect
data addressing is available. A flag in the CCW spec­
ifies that an indirect-data-address list is to be used to
designate the storage areas for that CCW. Each time
the boundary of a 2,048-byte block of storage is
reached, the list is referenced to determine the next
block of storage to be used. By extending the stor­
age addressing capabilities of the channel, channel
indirect data addressing permits essentially the same
CCW sequences to be used for a program running
with dynamic address translation in the CPU that
would be used if it were operating with equivalent
contiguous real storage.
The concluding of an I/O operation normally is
indicated by two conditions: channel end and device
end. The channel-end condition indicates that the I/O device has received or provided all data associ­
ated with the operation and no longer needs channel
facilities. The device-end signal indicates that the I/O device has concluded execution of the opera­
tion. The device-end condition can occur concur­
rently with the channel-end condition or later.
Operations that keep the control unit busy after
releasing channel facilities may, under certain condi­
tions, cause a third type of signal. This signal, called
control unit end, may occur only concurrently with
or after channel end and indicates that the control
unit has become available for initiation of another
operation.
The conditions signaling the concluding of an I/O operation can be brought to the attention of the
program by I/O interruptions or, when the CPU is
disabled for I/O interruptions from the channel, by
programmed interrogation of the I/O device. In
either case, these conditions cause storing of the CSW, which contains additional information con­
cerning the execution of the operation. At the time
the channel-end condition is generated, the channel
identifies to the program the last CCW used and
provides its residual byte count, thus indicating the
extent of main storage used. Both the channel and
the device can provide indications of unusual condi-

tions with channel end. The control-unit-end and
device-end conditions can be accompanied by error
indications from the device.
Facilities are provided for the program to initiate
execution of a chain of I/O operations with a single
START I/O or START I/O FAST RELEASE.
When the chaining flags in the current CCW specify
command chaining and no unusual conditions have
been detected in the operation, the receipt of the
device end signal causes the channel to fetch a new
CCW and to initiate a new command at the device.
A chained command is initiated by means of the
same sequence of signals over the I/O interface as
the first command specified by ST ART I/O or
ST ART I/O FAST RELEASE. The ending signals
occurring at the concluding of an operation caused
by a CCW specifying command chaining are not
made available to the program when another opera­
tion is initiated by the command chaining; the chan­
nel continues execution of the channel program. If,
however, an unusual condition has been detected,
the ending signals cause suppression of command
chaining and a termination of the channel program.
Conditions that initiate I/O interruptions are
asynchronous to activity in the CPU, and more than
one condition can occur at the same time. The chan­
nel and the CPU establish priority among the condi­
tions so that only one interruption request is pro­
cessed at a time. The conditions are preserved in the I/O devices or subchannels until accepted by the CPU. Execution of an I/O operation or chain of opera­
tions thus involves up to four levels of participation:
1. Except for the effects caused by the integration
of CPU and channel equipment, the CPU is
busy for the duration of execution of START I/O or START I/O FAST RELEASE, which
lasts at most until the addressed I/O device
responds to the first command.
2. The subchannel is busy with the execution
from the initiation of the operation at the I/O device until the channel-end condition for the
last operation of the command chain is accept­
ed by the CPU. 3. The control unit may remain busy after the
subchannel has been released and may gener­
ate the control-unit-end condition when it be­
comes free.
4. The I/O device is busy from the initiation of
the first operation until the device-end condi­
tion associated with the operation is accepted
or cleared by the CPU. A pending device-end condition causes the associ­
ated device to appear busy, but normally does not
affect the state of any other part of the system. A
pending control-unit-end condition normally blocks
communications through the control unit to any de­
vice attached to it, and a pending channel-end condi­
tion normally blocks all communications through the
sub channel.
Compatibility of Operation
The organization of the I/O system provides for a
uniform method of controlling I/O operations. The
capability of a channel, however, depends on its use
and on the CPU model to which it is attached.
Channels are provided with different data-transfer
capabilities, and an I/O device designed to transfer
data only at a specific rate (a magnetic tape unit or a
disk storage, for example) can operate only on a
channel that can accommodate at least this data rate.
The data rate a channel can accommodate de-
pends also on the way the I/O operation is programmed.
The channel can sustain its highest data rate
when no data chaining is specified. Data chaining
reduces the maximum allowable rate, and the extent
of the reduction depends on the frequency at which
new CCWs are fetched and on the address resolu-
tion of the first byte in each new main-storage area.
Furthermore, since in most instances the channel
may share main storage with the CPU and other
channels, activity in the rest of the system affects the
accessibility of main storage and, hence, the instan­
taneous load the channel can sustain.
In view of the dependence of channel capacity on
programming and on activity in the rest of the sys­
tem, an evaluation of the ability of elements in a
specific I/O configuration to function concurrently
must be based on a consideration of both the data
rate and the way the I/O operations are programmed.
Two systems employing identical complements of I/O devices may be able to execute certain programs
in common, but it is possible that other programs
requiring, for example, data chaining, may not run
on one of the systems because of the increased load
caused by the data chaining.
Control of Input/ Output Devices I The CPU controls I/O operations by means of eight I/O instructions: START I/O, START I/O FAST RELEASE,TESTI/O,CLEARI/O,HALTI/O, I HALT DEVICE, TEST CHANNEL, and STORE CHANNELID.
The instruction TEST CHANNEL and STORE CHANNEL ID address a channel; they do not ad­ I dress an I/O device. The other six I/O instructions
address a channel and a device on that channel.
Input/Output Operations 191