pattern character 150 PCI (see program-controlled interruption) PER (see program-event recording) PER events
with concurrent exceptions 45
with dynamic address translation 42
with interruptible instruction 42
with LOAD PSW 41
with SUPERVISOR CALL 40 point of interruption (interruptions) 74
point of interruption (machine-check interruption) 176
postnormalization 159
power check indication, thermal/CB 247
power-off key 246
power-on key 246
power-on reset CPU 53
main storage, effect of on 53 TOD (time-of-day) clock 53
powers of two, table (see Appendix F)
prefixing 95, 14
prenormalization 159
priority
of access exceptions 84
of clock comparator interruptions 86
of CPU timer interruptions 86
of exigent machine-check interruptions 89
of external interruptions 86
of interrupt key interruptions 86
of interval timer interruptions 86
of I/O interruptions 227, 89
of program exceptions 85
table of program exceptions 85
privileged
instruction 30 operation exception 76
problem state 30 processor address (stored by external interruption) Jl/;'O program
check (channel status condition) 234
execution 19
interruption 75
identification in main storage 90 program-controlled interruption (PCI) 215
channel status condition 233
flag (in CCW) 211
program-event recording (PER) 39,80 address in main storage 41
code 41
control register allocation 40 event masks 40 general-register-alteration m:asks 40 indication of events concurrently with other interruption
conditions 43
interruption identification in main storage 90 mask, EC mode 34
operation 40 starting/ending address 40 storage area designation 42
program events 42
general register alteration 43
indication of 45
instruction fetching 42
storage (main) alteration 42
successful branching 42
program execution 19 Page of GA22-70004 Revised September 1, 1975
By TNL: GN22-0498
program-interruption conditions
access exception, recognition of 80 addressing exception 76
data exception 78
decimal-divide exception 78
decimal-overflow exception 78
execute exception 76
exponent-overflow exception 78
exponent-underflow exception 79
fixed-point divide exception 78
fixed-point overflow exception 78
floating-point divide exception 79
monitor event 80 operation 75
page-translation 79
priority of 85
privileged operation 76
program event 80 segment-translation 79
significance 79
special operation 80 specification 77
table of priorities of 85
translation specification 79
program mask and condition code validity bit (in machine-check
interruption code) 180 program mask in PSW BC mode 34
EC mode 35
program-reset
initial 52
order 97
program state (see CPU state)
program status word (see PSW) protection check (channel status condition) 234
protection exception 76
summary table 77
protection key
in CAW 210 in CSW 228,236
protection key in PSW BC mode 33
EC mode 34
protection, storage (see storage protection) PSW (program status word) 32, 22 PSW, BC mode format 33
channel mask 33
condition code 34
current 16
extended-control (EC) mode 34
external mask 33
ILC (instruction-length code) 34
instruction address 34
interruption code 34 I/O mask 33
machine-check mask 34
problem state bit 34
program mask 34
protection key 34
wait state bit 34 PSW, EC mode format 33
condition code 35
EC mode bit 34
external mask 34
instruction address 35 I/O mask 34
Index 323
Page of GA22-7000-4 Revised September 1, 1975
By TNL: GN22-0498 PSW, EC mode format (continued)
machine-check mask 35
problem state bit 35
program-event recording (PER) mask 34
program mask 35
protection key 34
translation mode biv 34
wait state bit 35 PSW EMWP validity bit (in machine-check interruption code) 180 PSW (IPL) in absolute main storage 91 PSW mask and key validity bit (in machine-check interruption
code) 180 PSW translation control, bit 5 58 PURGE TLB (PTLB) instruction 107 R field of an instruction 20, 19
rate control 246
read backward command, I/O 218
READ DIRECT (RDD) instruction 107 real address (of a main-storage location) 57,96, 14
formation of 62
real-time clock, interval timer as a 49
receiver-check status bit 100 recognition of access exceptions 80 table 82
recovery
condition (machine-check interruption condition) 175
mechanisms 172
report mask (in control register 14) 182
system (machine-check interruption condition) 178,175
redundancy correction '172 reference and change recording (in main storage) 67
change bit 67, 38
reference bit 67, 38
references to storage
block concurrent 27
single access 26
region code
in machine-check extended interruption information 178
in machine-check interruption code validity bits 180 register
control 36
floating-point 16
general 16 20 save area (machine-check extended interruption
information) 178
validity bits (in machine-check interruption code) 180 remote operator control (ROCP) 248
repressible machine-check interruption condition
definition of 175
handling of (interruption action) 175
reset, ][/0 system 194,51
effect on working device 195
upon malfunction 195 RESET REFERENCE BIT (RRB) instruction 107 resets 50 CPU reset 51
initial CPU reset 51
initial program reset 52
manual initiation of 50 power-on reset 53
program reset 51
store status facility, effect on 54
system clear reset 53
324 System/370 Principles of Operation
restart
interruption 88
key 246
new PSW in main storage 91
old PSW in main storage 91
order 97
result
character in editing 151
condition in editing 151
retry, CPU 172
right of access to main storage 38 ROCP (remote operator control panel) 248
rounding (LRDR, LRER) instructions 166
RR instruction format 20 RS instruction format 20 running state 30 RX instruction format 20 S instruction format 20 save area (machine-check extended interruption information)
segment
index field 59
invalid bit 60 size bits (in control register 0) 59
table 59
table address (in control register 1) 59
table entry 59
table format 5? table length (in control register 1) 59
table lookup 61
translation exception 79
selective reset, I/O 195
selector channel 188
sense
command, I/O 219
data (in I/O) 219
order 97
sequence of main storage accesses (references) 23
sequence code 241
validity flag 241
sequential execution of instructions
change in by interruption 70 normal 22
serialization 28 SET CLOCK (SCK) instruction 108 SET CLOCK COMPARATOR (SCKC) instruction 108 SET CPU TIMER (SPT) instruction 109 SET PREFIX (SPX) instruction 109 SET PROGRAM MASK (SPM) instruction 138 SET PSW KEY FROM ADDRESS (SPKA) instruction 109 SET STORAGE KEY (SSK) instruction 110 SET SYSTEM MASK (SSM) instruction 110 set system mask suppression 32
shared main storage 95
shared sub channel 189 SHIFT AND ROUND DECIMAL (SRP) instruction 153
example 307 SHIFT LEFT DOUBLE (SLDA) instruction 138
example 302 SHIFT LEFT DOUBLE LOGICAL (SLDL) instruction 139 SHIFT LEFT SINGLE (SLA) instruction 139
example 302 SHIFT LEFT SINGLE LOGICAL (SLL) instruction 139 SHIFT RIGHT DOUBLE (SRDA) instruction 140 SHIFT RIGHT DOUBLE LOGICAL (SRDL) instruction 140 178
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