guard digit, increases the precision of the final re- . suIt.
Number Representation
The fraction of a floating-point number is expressed
in hexadecimal digits. The radix point of the fraction
is assumed to be immediately to the left of the high­
order fraction digit. The fraction is considered to be
multiplied by a power of 16. The characteristic por­
tion, bits 1-7 of the floating-point formats, indicates
this power. The bits within the characteristic field
can represent numbers from 0 through 127. To ac­
commodate large and small magnitudes, the charac­
teristic is formed by adding 64 to the actual expo­
nent. The range of the exponent is thus -64 through
+63. This technique produces a characteristic in
excess-64 notation.
Both positive and negative quantities have a true
fraction, the sign being indicated by the sign bit. The
number is positive or negative, depending on wheth­
er the sign bit is zero or one, respectively.
The range covered by the magnitude (M) of a
normalized floating-point number is:
In the short format:
16-
65 M (1-16-
6
') X 16
63
In the long format:
16-
65 M (1-16-
14
) X 16
63
In the extended format:
16-
65 M (1-16-
28
) X 16
63
In all formats, approximately:
5.4 x 10-
79 M 7.2 X 10
75 A number with a zero characteristic, zero frac­
tion, and plus sign is called a true zero. When an
extended result is made a true zero, both the high­
order and low-order parts are made true zero.
A true zero may arise as the result of an arithme­
tic operation because of the particular magnitude of
the operands. A result is forced to be true zero when
(1) an exponent underflow occurs and the exponent­
underflow mask bit in the PSW is zero, (2) the result
fraction of an addition or subtraction operation is
zero and the significance mask bit in the PSW is
zero, or (3) the operand of HAL VB, one or both
operands of MULTIPLY, or the dividend in DI­ VIDE has a zero fraction.
When a program interruption due to exponent
underflow occurs, a true zero fraction is not forced;
instead, the fraction and sign remain correct, and the
characteristic is 128 too large. When a program in­
terruption due to the significance exception occurs,
the flaction remains zero, the sign is positive, and
the characteristic remains correct. The exponent­
overflow and exponent-underflow exceptions do not
cause a program interruption when the result has a
zero fraction. When a divisor has a zero fraction,
division is omitted, and a program interruption for a
floating-point-divide exception occurs. In addition
and subtraction, an operand with a zero fraction or
characteristic participates as a normal number.
The sign of a sum, difference, product, or quo­
tient with zero fraction is positive. The sign of a
zero fraction resulting from other operations is es­
tablished by the rules of algebra from the operand
signs.
Normalization
A quantity can be represented with the greatest pre­
cision by a floating-point number of given fraction
length when that number is normalized. A normal­
ized floating-point number has a nonzero high-order
hexadecimal fraction digit. If one or more high-order
fraction digits are zero, the number is said to be un­
normalized. The process of normalization consists of I shifting the fraction left, one digit at a time, until high-order hexadecimal digit is nonzero and reducmg
the characteristic by the number of hexadecimal
digits shifted. For ex;tended results, the entire frac­
tion participates in the normalization; therefore, the
low-order part mayor may not appear to be a nor­
malized long number, depending on the value of the
fraction. A number with a zero fraction cannot be
normalized, and its characteristic therefore remains
unchanged when normalization is called for.
Normalization usually takes place when the inter­
mediate arithmetic result is changed to the final re­
sult. This function is called postnormalization. In
performing multiplication and division, the operands
are normalized before the arithmetic process. This
function is called prenormalization.
Floating-point operations may be performed with
or without normalization. Most operations are per­
formed only with normalization. Addition and sub­
traction with short or long operands may be speci­
fied either way.
When an operation is performed without normali­
zation, high-order zeros in the result fraction are not
eliminated. The result mayor may not be normal­
ized, depending upon the original operands.
In both normalized and unnormalized operations,
the initial operands need not be in normalized form.
Also, intermediate fraction results are shifted right
when an overflow occurs, and the intermediate frac­
tion result is truncated to the final result length after
the shifting, if any.
Programming Note
Since normalization applies to hexadecimal digits,
the three high-order bits of the fraction of a normal­
ized number may be zero.
Floating-Point Instructions 159

Instructions
The floating-point instructions and their mnemonics,
formats, and operation codes follow. The table indi­
cates wh{m the condition code is set and the excep­
tions in operand designations, data, or results that
cause a program interruption.
Note: In the detailed descriptions of the individual
instructions, the mnemonic and the symbolic oper­
and designation for the IBM System/370 assembly
language are shown with each instruction. For a
register-to-register operation using LOAD (short),
for example, LER is the mnemonic and Rl,R2 the
operand designation.
Mnemonics for the floating-point instructions
have an "R" as the last letter when the instruction is
in the RR format. For instructions where all oper­
ands are the same length, certain letters are used to
represent operand-format length and normalization,
as follows:
E short normalized U short unnormalized
D long normalized
W long unnormalized
X extended normalized
Add Normalized
AER Rl,R2
[RR, Short Operands]
AE Rl,D2(X2,B2)
[RX, Short Operands] I R1 I X
2 0 8 12
ADR Rl,R2
[RR, Long Operands]
[
2A I R, I R2 I 0 8 12 15
AD Rl,D2(X2,B2)
[RX, Long Operands] R1
X
2 0 8 12
8
2
16 20 8
2
16 20 160 System/370 Principles of Operation
31
AXR Rl,R2
[RR, Extended Operands] I 36 I R1 I R2 I 0 8 12 15
The second operand is added to the first operand,
and the normalized sum is placed in the first­
operand location.
Addition of two floating-point numbers consists
in characteristic comparison and fraction addition.
The characteristics of the two operands are com­
pared, and the fraction accompanying the smaller
characteristic is shifted right, with its characteristic
increased by one for each hexadecimal digit of shift
until the two characteristics agree.
When an operand is shifted right during aligri­
ment, the leftmost hexadecimal digit of the field
shifted out is retained as a guard digit. The operand
that is not shifted is considered to be extended with
a low-order zero. Both operands are considered to
be extended with low-order zeros when no align­
ment shift occurs. The fractions are then added alge­
braically to form an intermediate sum.
The short intermediate-sum fraction consists of
seven hexadecimal digits and a possible carry. The
long intermediate-sum fraction consists of 15 hexa­
decimal digits and a possible carry. The extended
intermediate-sum fraction consists of 29 hexadeci­
mal digits and a possible carry. If a carry is present,
the sum is shifted right one digit position, and the
characteristic is increased by one.
After the addition, the intermediate sum is shifted
left as necessary to form a normalized number, pro­
vided the fraction is not zero. Vacated low-order
digit positions are filled with zeros, and the charac­
teristic is reduced by the number of hexadecimal
digits of shift. The intermediate-sum fraction is sub­
sequently truncated to the proper result-fraction
length.
The sign of the sum is determined by the rules of
algebra, unless all digits of the intermediate-sum
fraction are zero, in which case the sign is made plus.
An exponent-overflow exception is recognized
when a carry from the high-order position of the
intermediate-sum fraction causes the characteristic
of the normalized sum to exceed 127. The operation
is completed by making the characteristic 128 less
than the correct value, and a program interruption
for exponent overflow occurs. The result is normal­
ized, the sign and fraction remain correct, and, for AXR, the low-order characteristic remains correct.
An exponent-underflow exception exists when the
characteristic of the normalized sum is less than zero
and the fraction is not zero. If the exponent-