I nstructions (continued) STORE MULTIPLE SUBTRACT.
SUBTRACT HALFWORD .
SUBTRACT LOGICAL SUPERVISOR CALL TEST AND SET. TEST UNDER MASK TRANSLATE
TRANSLATE AND TEST. UNPACK. This chapter includes all the unprivileged instruc­
tions desc:ribed in this manual, other than the deci­
mal and floating-point instructions.
Data F'ormat
The general instructions treat data as being of four
types: signed fixed-point numbers, unsigned fixed­
point numbers, unstructured logical quantities, and
decimal data. Data is treated as decimal by the con­
version, packing, and unpacking instructions and is
described in the chapter "Decimal Instructions. " Data resides in general registers or in storage or is
introduced from the instruction stream.
In a storage-to-storage operation the operand
fields may be defined in such a way that they over­
lap. The e:ffect of this overlap depends upon the
operation. When the operands remain unchanged, as
in CaMP ARE or TRANSLATE AND TEST over­
lapping does not affect the execution of the opera­
tion. For ilnstructions such as MOVE and TRANS­
LATE, one operand is replaced by new data, and the
execution of the operation may be affected by the
amount ojf overlap and the manner in which data is
fetched or stored. For purposes of evaluating the
effect of overlapped operands, data is considered to
be handled one eight-bit byte at a time. All overlap­
ping fields are considered valid.
Number Representation
Fixed-point numbers are treated as signed or un­
signed integers. In an unsigned fixed-point number, all bits are
used to express the absolute value of the number.
When two unsigned fixed-point numbers are added,
the shorter number is considered to be extended
with high-·order zeros.
For signed fixed-point numbers, the leftmost bit
represents the sign, which is followed by the integer
field. Positive numbers are represented in true binary
notation with the sign bit set to zero. Negative num- I bers are in two's-complement binary
notation with a one in the sign-bit position.
116 System/370 Principles of Operation 142
143
143
143
144
144
145
145
145
146 I Specifically, a negative num. ber is represented by
the two's complement of the positive number. The
two's complement of a number is obtained by invert-
ing each bit of the number and adding a one in the
low-order bit position.
This type of number representation can be con­
sidered the low-order portion of an infinitely long
representation of the number. When the number is
positive, all bits to the left of the most significant bit
of the number are zeros. When the number is nega­
tive, all these bits are ones. Therefore, when an oper­
and must be extended with high-order bits, the ex­
pansion is achieved by setting the bits equal to the
high-order bit of the operand.
The notation for signed fixed:-point numbers does
not include a negative zero. It has a number range in
which the set of negative numbers is one larger than
the set of positive numbers. The maximum positive
number consists of an all-one integer field with a
sign bit of zero, whereas the maximum negative
number (the negative number with the greatest ab­
solute value) consists of an all-zero integer field with
a sign bit of one.
The complement of the maximum negative num­
ber cannot be represented in the same number of
bits. When an operation, such as a subtraction of the
maximum negative number from zero, attempts to
produce the complement of the maximum negative
number, a fixed-point overflow exception is recog­
nized. An overflow does not result, however, when
the maximum negative number is complemented and
the final result is within the representable range. An
example of this case is a subtraction of the maximum
negative number from minus one. The product of
two maximum negative numbers is representable as
a double-length positive number.
In discussions of signed fixed-point numbers in
this pUblication, the expression "32-bit signed integ-. er" denotes a 31-bit integer with a sign bit, and the
expression" 64-bit signed integer" denotes a 63-bit
integer with a sign bit.
In some operations, the result is achieved by the
use of the one's coinplement of the number. The
one's complement of a number is obtained by invert­
ing each bit of the number.
In an arithmetic operation, a carry out of the in­
teger field changes the sign. However, in algebraic
left-shifting the sign bit does not change even if sig­
nificant high-order bits are shifted out.
Programming Note
The integer part of a signed fixed-point number may
be considered to represent a positive value, with the
sign representing a value of either zero or the maxi­
mum negative number.
Instructions
The general instructions and their mnemonics, for­
mats, and operation codes are listed in the following
table. The table also indicates when the condition
code is set and the exceptional conditions in operand
designations, data, or results that cause a program
interruption.
Note: In the detailed descriptions of the individual
instructions, the mnemonic and the symbolic oper­
and for the IBM System/370 assembly
language are shown with each instruction. For LOAD AND TEST, for example, LTR is the mne­
monic and R 1, R2 the operand designation.
Add
AR [RR]
o 8 12 15
A [RX]
5A
o 8 12 16 20 The second operand is added to the first operand,
and the sum is placed in the first-operand location.
31
Addition is performed by adding all 32 bits of
both operands. If the carry out of the sign-bit posi­
tion and the carry out of the high-order numeric bit
position agree, the sum is satisfactory; if they disa­
gree, an overflow occurs. The sign bit is not changed
after the overflow. A positive overflow yields a neg­
ative final sum, and a negative overflow results in a
positive sum. The overflow causes a program inter­
ruption when the fixed-point overflow mask bit is
one.
Resulting Condition Code:
o Sum is zero
1 Sum is less than zero
2 Sum is greater than zero
3 Overflow
Program Exceptions:
Access (fetch, operand 2 of A only)
Fixed-Point Overflow
Programming Note
In two's-complement notation a zero result is always
positive.
Add Hal/word
AH [RX]
4A
o 8 12 16 20 The second operand is added to the first operand,
and the sum is placed in the first-operand location.
The second operand is two bytes in length and is
considered to be a 16-bit signed integer.
31
The second operand is expanded to 32 bits before
the addition by propagating the sign-bit value
through the 16 high-order bit positions. The con­
tents of the second operand in main storage remain
unchanged.
Addition is performed by adding all 32 bits of
both operands. If the carry out of the sign-bit posi­
tion and the carry out of the high-order numeric bit
position agree, the sum is satisfactory; if they
disagree, an overflow occurs. The sign bit is not
changed after the overflow. A positive overflow
yields a negative final sum, and a negative overflow
results in a positive sum. The overflow causes a pro­
gram interruption when the fixed-point overflow
mask bit is one.
Resulting Condition Code: o Sum is zero
1 Sum is less than zero
2 Sum is greater than zero
3 Overflow
Program Exceptions:
Access (fetch, operand 2)
Fixed-Point Overflow
General Instructions 117
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