Instructions
The floating-point instructions and their mnemonics,
formats, and operation codes follow. The table indi
cateswh{m the condition code is set and the excep
tions in operand designations, data, or results that
cause a program interruption.
Note: In the detailed descriptions of the individual
instructions, the mnemonic and the symbolic oper
and designation for the IBM System/370 assembly
language are shown with each instruction. For a
register-to-register operation usingLOAD (short),
forexample, LER is the mnemonic and Rl,R2 the
operand designation.
Mnemonics for the floating-point instructions
have an"R" as the last letter when the instruction is
in the RR format. For instructions where all oper
ands are the same length, certain letters are used to
represent operand-format length and normalization,
as follows:
E short normalizedU short unnormalized
D long normalized
W long unnormalized
X extended normalized
Add Normalized
AER Rl,R2
[RR, Short Operands]
AE Rl,D2(X2,B2)
[RX, Short Operands]I R1 I X
20 8 12
ADR Rl,R2
[RR, Long Operands]
[
2AI R, I R2 I 0 8 12 15
AD Rl,D2(X2,B2)
[RX, Long Operands]
X
20 8 12
8
2
1620 8
2
1620 160 System/370 Principles of Operation
31
AXR Rl,R2
[RR, Extended Operands]I 36 I R1 I R2 I 0 8 12 15
The second operand is added to the first operand,
and the normalized sum is placed in the first
operand location.
Addition of two floating-point numbers consists
in characteristic comparison and fraction addition.
The characteristics of the two operands are com
pared, and the fraction accompanying the smaller
characteristic is shifted right, with its characteristic
increased by one for each hexadecimal digit of shift
until the two characteristics agree.
When an operand is shifted right during aligri
ment, the leftmost hexadecimal digit of the field
shifted out is retained as a guard digit. The operand
that is not shifted is considered to be extended with
a low-order zero. Both operands are considered to
be extended with low-order zeros when no align
ment shift occurs. The fractions are then added alge
braically to form an intermediate sum.
The short intermediate-sum fraction consists of
seven hexadecimal digits and a possible carry. The
long intermediate-sum fraction consists of 15 hexa
decimal digits and a possible carry. The extended
intermediate-sum fraction consists of 29 hexadeci
mal digits and a possible carry. If a carry is present,
the sum is shifted right one digit position, and the
characteristic is increased by one.
After the addition, the intermediate sum is shifted
left as necessary to form a normalized number, pro
vided the fraction is not zero. Vacated low-order
digit positions are filled with zeros, and the charac
teristic is reduced by the number of hexadecimal
digits of shift. The intermediate-sum fraction is sub
sequently truncated to the proper result-fraction
length.
The sign of the sum is determined by the rules of
algebra, unless all digits of the intermediate-sum
fraction are zero, in which case the sign is made plus.
An exponent-overflow exception is recognized
when a carry from the high-order position of the
intermediate-sum fraction causes the characteristic
of the normalized sum to exceed 127. The operation
is completed by making the characteristic 128 less
than the correct value, and a program interruption
for exponent overflow occurs. The result is normal
ized, the sign and fraction remain correct, and,for AXR, the low-order characteristic remains correct.
An exponent-underflow exception exists when the
characteristic of the normalized sum is less than zero
and the fraction is not zero. If the exponent-
The floating-point instructions and their mnemonics,
formats, and operation codes follow. The table indi
cates
tions in operand designations, data, or results that
cause a program interruption.
Note: In the detailed descriptions of the individual
instructions, the mnemonic and the symbolic oper
and designation for the IBM System/370 assembly
language are shown with each instruction. For a
register-to-register operation using
for
operand designation.
Mnemonics for the floating-point instructions
have an
in the RR format. For instructions where all oper
ands are the same length, certain letters are used to
represent operand-format length and normalization,
as follows:
E short normalized
D long normalized
W long unnormalized
X extended normalized
Add Normalized
AER Rl,R2
[RR, Short Operands]
AE Rl,D2(X2,B2)
[RX, Short Operands]
2
ADR Rl,R2
[RR, Long Operands]
[
2A
AD Rl,D2(X2,B2)
[RX, Long Operands]
X
2
8
2
16
2
16
31
AXR Rl,R2
[RR, Extended Operands]
The second operand is added to the first operand,
and the normalized sum is placed in the first
operand location.
Addition of two floating-point numbers consists
in characteristic comparison and fraction addition.
The characteristics of the two operands are com
pared, and the fraction accompanying the smaller
characteristic is shifted right, with its characteristic
increased by one for each hexadecimal digit of shift
until the two characteristics agree.
When an operand is shifted right during aligri
ment, the leftmost hexadecimal digit of the field
shifted out is retained as a guard digit. The operand
that is not shifted is considered to be extended with
a low-order zero. Both operands are considered to
be extended with low-order zeros when no align
ment shift occurs. The fractions are then added alge
braically to form an intermediate sum.
The short intermediate-sum fraction consists of
seven hexadecimal digits and a possible carry. The
long intermediate-sum fraction consists of 15 hexa
decimal digits and a possible carry. The extended
intermediate-sum fraction consists of 29 hexadeci
mal digits and a possible carry. If a carry is present,
the sum is shifted right one digit position, and the
characteristic is increased by one.
After the addition, the intermediate sum is shifted
left as necessary to form a normalized number, pro
vided the fraction is not zero. Vacated low-order
digit positions are filled with zeros, and the charac
teristic is reduced by the number of hexadecimal
digits of shift. The intermediate-sum fraction is sub
sequently truncated to the proper result-fraction
length.
The sign of the sum is determined by the rules of
algebra, unless all digits of the intermediate-sum
fraction are zero, in which case the sign is made plus.
An exponent-overflow exception is recognized
when a carry from the high-order position of the
intermediate-sum fraction causes the characteristic
of the normalized sum to exceed 127. The operation
is completed by making the characteristic 128 less
than the correct value, and a program interruption
for exponent overflow occurs. The result is normal
ized, the sign and fraction remain correct, and,
An exponent-underflow exception exists when the
characteristic of the normalized sum is less than zero
and the fraction is not zero. If the exponent-
