the addressed device or is working with the
addressed device. The protection-key,
command-address, and count fields describe
the state of the operation at the time CLEAR I/O is executed. (Some channels alternatively
indicate busy under these conditions.)
4. The channel detected an equipment error dur­
ing the execution of the instruction. The CSW
identifies the error condition. The states of the
channel and the I/O operations in progress are
unpredictable. The limited channel logout, if
stored, indicates a sequence code of 000. When CLEAR I/O cannot be executed because
of a pending-logout condition that affects the opera­
tional capability of the channel, a full CSW is stored.
The fields in the CSW are all set to zeros, with the
exception of the logout-pending and channel-control­
check bits, which are set to ones. No channel logout
is associated with this status.
Program Exceptions:
Privileged operation
Resulting Condition Code: a No operation in progress for the
addressed device
1 CSW stored
2 Channel busy
3 Not operational
The condition code set by the CLRIO function
for all possible states of the I/O system is shown
graphically as follows. The condition code set when
CLEAR I/O causes the TIO function to be per­
formed is shown graphically in the definition of the
instruction TEST I/O. Channel A
Programming Note
Since some channels cause a condition code 2 to be
set when the instruction is received and the channel
is in the working state, it may be useful to issue a
halt instruction and then CLEAR I/O to the desired
address. Using HALT DEVICE will ensure that
condition code 2 is received on the CLEAR I/O only when the channel is working with a device oth­
er than the one addressed. U sing HALT I/O will
ensure that the current working state, if any, is termi­
nated without regard for the address.
Because of the inability of CLEAR I/O to termi­
nate operations on some channels when in the work­
ing state, the instruction is not a suitable substitute
for HALT I/O or HALT DEVICE.
The combination of HALT DEVICE followed by
CLEAR I/O can be used to clear out all activity on
a channel by executing the two instructions for all
device addresses on the channel.
Halt Device
HDV D2(B2) [S]
9E01 82 D2 0 16 20 31
The current I/O operation at the addressed I/O device is terminated. The subsequent state of the
sub channel depends on the type of channel. HALT
DEVICE is executed only when the CPU is in the
supervisor state. Bits 8-14 of the instruction are
ignored. Wf I Subchannel 1 A Ilf 1
1
# 1 WfIW# 1 N
o 0 1* 0 1* 3
A Ilf 1 1# I Wf I W#I N
o 0 1* 0 1* 3
A Ilf 1
1
# t t tt t tt ttt A
W
N Available I nterruption pending If = I nterruption pending for a device other than
the one addressed 1#= Interruption pe.nding for the addressed device
Working Wf = Working with a device other than the one
addressed
W#= Working with the addressed device
Not operational CSW stored
Condition Codes Set by CLEAR I/O t In the WfAX, WflfX, and W#Nf.X states, a
condition code 0 or 2 may be set, depending on the channel. tt In the Wfl#X, W#N#X, and W#XX states, a
condition code 1 (with the CSW stored) or 2 may be set,
depending on the channel. ttt In the WfNX state, a condition code 2 or 3 may be set,
depending on the channel. Note: Underscored codes pertain to conditions that can occur only on the multiplexer channel. lnput/Output Operations 199

Bits 16-31 of the second-operand address identify
the channel, the subchannel, and the 110 device to
which instruction applies.
When the channel is either available or in the
interruption pending state with the subchannel avail­
able or working with the addressed device, HALT
DEVICE causes the addressed device to be selected
and to signaled to terminate the current opera­
tion, if any. If the subchannel is working with the
addressed device, HALT DEVICE also causes the
subchannel to be set up to signal termination of the
device operation the next time the device requests or
offers a byte of data, if any. Chaining, if indkated in
the subchannel, is suppressed. If the sub channel is
available, the sub channel is not affected.
When the channel is either available or in the
interruption pending state with the sub channel either
working with a device other than the one addressed
or in the interruption pending state, no action is tak­
en.
When the channel is working in burst mode with
the addressed device, data transfer across the 1/0 interface for the operation is immediately tenninat­
ed, and the device immediately disconnects from the
channel. Chaining, if indicated in the subcharmel, is
suppressed.
When the channel is working in burst mode with a
device other than the one addressed, and the sub­
channel is available, in the interruption pending
state, or working with a device other than the; one
addressed, no action is taken. If the sub channel is
working with the addressed device, the sub channel is
set up to signal termination of the device operation
the next time the device requests or offers a byte of
data, if any. Chaining, if indicated in the subchannel,
is suppressed.
When the channel is working in burst mode with a
device other than the one addressed and the sub­
channel is not operational, is in the interruption
pending state, or is working with a device other than
the one addressed, the resulting condition code may,
in some channels, be determined by the sub channel
state.
Termination of a burst operation by HALT DE­
VICE on a selector channel causes the channel and
sub channel to be placed in the interruption pending
state. Generation of the interruption condition is not
contingent on the receipt of a status byte from the
device. When HALT DEVICE causes a burst opera­
tion on a byte-multiplexer channel to be terminated,
the sub channel associated with the burst operation
remains in the working state until the device pro­
vides ending status, whereupon the subchannel en­
ters the interruption pending state. The termination
of a burst operation by HALT DEVICE on a block- 200 System/370 Principles of Operation multiplexer channel may, depending on the model
and the type of subchannel, take place as for a selec­
tor channel or may allow the sub channel to remain
in the working state until the device provides ending
status.
When any of the three conditions numbered be­
low occurs, HALT DEVICE causes the 16-bit unit­
and channel-status portion of the CSW to be re­
placed by a new set of status bits. The contents of
the other fields of the CSW are not changed. The CSW stored by HALT DEVICE pertains only to the
execution of HALT DEVICE and does not describe
under what conditions the 110 operation at the ad­
dressed subchannel is terminated. The extent of data
transfer, and the conditions at the termination of the
operation at the subchannel, are provided in the CSW associated with the interruption condition
caused by the termination. The three conditions are:
1. The addressed device is selected and signaled
to terminate the current operation, if any. The CSW then contains zeros in the status field
unless a machine malfunction is detected.
2. The control unit is busy and the device cannot
be given the signal to temrinate the operation.
The CSW unit-status field contains the busy
and status modifier bits. The channel-status
field contains zeros unless a machine malfunc­
tion is detected.
3. The channel detects a machine malfunction
during the execution of HALT DEVICE. The
status bits in the CSW then identify the error
condition. The state of the channel and the
progress of the 110 operation are unpredicta­
ble.
When HALT DEVICE cannot be executed be­
cause of a pending logout condition which affects
the operational capability of the channel or subchan­
nel, a full CSW is stored. The fields in the CSW are
all set to zeros, with the exception of the logout­
pending bit and the channel control check bit, which
are set to ones. No channel logout is associated with
this status.
When HALT DEVICE causes data transfer over
the 110 interface to be terminated, the control unit
associated with the operation remains unavailable
until the data-handling portion of the operation in
the control unit is concluded. Concluding of this
portion of the operation is signaled by the generation
of channel end. This may occur at the normal time
for the operation, or earlier, or later, depending on
the operation and type of device. If the control unit
is shared, all devices attached to the control unit
appear in the working state on that channel until the
channel end condition is accepted by the CPU. The 110 device executing the terminated operation re-