error after completion of the instruction. The CSW identifies the error condition. The
channel-end and busy bits are off, unless the
error was detected after the device was select­
ed, and the device was found to be busy, in
which case the busy bit, as well as any bits in­
dicating pending interruption conditions, are
on. The interruption conditions indicated in
the CSW have been cleared at the device. The I/O operation has not been initiated. No inter­
ruption conditions are generated at the I/O device or subchannel. The state of the PCI bit
in the CSW is unpredictable.
3. An immediate operation was executed, and
either (1) no command chaining is specified
and no command retry occurs, or (2) chaining
is suppressed because of unusual conditions
detected during the operation. The CSW con­
tains the channel-end bit and any other indica­
tions provided by the channel or the device.
The busy bit is off. The I/O operation has
been initiated, but no information has been
transferred to or from the storage area desig­
nated by the CCW. No interruption conditions
are generated at the subchannel, and the sub­
channel is available for a new I/O operation. If
device end is not indicated, the device remains
busy, and a subsequent device-end condition is
generated. The CSW contains the PCI bit if
specified in the first CCW.
4. The I/O device contains a pending interruption
condition, or the control unit contains a pend­
ing interruption condition for the addressed
device. The CSW unit-status field contains the
busy bit, identifies the interruption condition,
and may contain other bits provided by the
device or control unit. The interruption condi­
tion is cleared. The channel-status field indi­
cates any error conditions detected by the chan­
nel and contains the PCI bit if specified in the
first CCW.
5. The I/O device or the control unit is executing
a previously initiated operation, or the control
unit has pending an interruption condition asso­
ciated with a device other than the one ad­
dressed. The CSW unit-status field contains
the busy bit or, if the control unit is busy, the
busy and status-modifier bits. The channel­
status field indicates any error conditions de­
tected by the channel and contains the PCI bit
if specified in the first CCW. When the SlOP function is performed, the control unit busy
condition may cause the same action as the SIO function. Page of GA22-7000-4 Revised September 1, 1975
By TNL: GN22-0498
6. The I/O device or control unit detected an
equipment or programming error during the
initiation, or the addressed device is in the not­
ready state. The CSW identifies the error con­
dition. The channel-end and busy bits are off,
unless the device was found to be busy, in
which case the busy bit, as well as any bits in­
dicating pending interruption conditions, are
on. The interruption conditions indicated in
the CSW have been cleared at the device. The I/O operation has not been initiated. No inter­
ruption conditions are generated at the I/O device or sub channel. The CSW contains the
PCI bit if specified in the first CCW.
When the SIO or SlOP function cannot be execut­
ed because of a pending logout condition which af­
fects the operational capability of the channel or
subchannel, a full CSW is stored. The fields in the CSW are all set to zeros, with the exception of the
logout-pending bit and the channel control check bit,
which are set to ones. No channel logout is associat­
ed with this status.
When the SlOP function causes condition code 0 to be set and subsequently a condition is encoun­
tered which would have caused a condition code 1 to
be set had the function been SIO, a deferred­
condition-code-l I/O interruption condition is gener­
ated. In the resulting I/O interruption, a full CSW is stored, and the deferred condition code appears
in the CSW. On the byte-multiplexer channel, both the SIO and SlOP functions cause the addressed device to be
selected and the operation to be initiated only after
the channel has serviced all outstanding requests for
data transfer for previously initiated operations.
Program Exceptions:
Privileged operation
Resulting Condition Code:
o I/O operation initiated and channel proceeding
with its execution
1 CSW stored
2 Channel or sub channel busy
3 Not operational
The condition code set by ST ART I/O and START I/O PAST RELEASE for all possible states
of the I/O system is shown graphically as follows. See "States of the Input/Output System" for a de­
tailed definition of the A, I, W, and N states.
Input/Output Operations 205

Page of GA22-7000-4 Revised September 1, 1975
By TNL: GN22-0498 Channel Subchannel A
A
2 3
A
2 2 3 2 2 3 Control Unit
or Device
A II I WIN I 1= 1*@ 1 *@ 3@ I A II I W IN I 1=1*@1*@ 3@
A I W
N
@ Available I:nterruption pending Working I\lot operational CSW stored When the SIOF function is performed, condition code 0 is set. The other condition code shown will be specified as a deferred condition code.
Note: Underscored condition codes pertain to
conditions that can occur only on the multiplexer channel. • When a nonimmediate I/O operation has been initiated,
and the channel is proceeding with its execution, condition
code 0 is set. • When an immediate operation has been initiated, and no
command chaining or command retry is taking place; or the
device is not ready; or an error condition has been detected
by the control unit or device, for the SIO function condition
code 1 is set, and the CSW is stored. For the SIOF function
condition code 0 is set, and a deferred condition code 1
interruption condition is generated.
Condition Codes Set by START I/O and START I/O FAST RELEASE Programming Notes
The advantage of START I/O FAST RELEASE
over START I/O is that less CPU time is required
for the execution of the instruction. For a START I/O instruction the device must be selected and
it must determine if the command and device condi­
tions allow the initiation of the operation prior to the
setting of the condition code, which allows the CPU to proceed to the next instruction. When the ST ART I/O FAST RELEASE instruction is used, the con­
dition code is set and the CPU proceeds to its next
instruction as soon as the control unit indicates it
is capable of communicating with the channel. Thus,
the CPU is freed for other activity earlier. A dis­
advantage, however, is that if a deferred condition
code is presented, the resultant CPU execution
time may be greater than that required in executing
START I/O. When the channel detects a programming error
during execution of the SIO function and the ad­
dressed device contains an interruption condition,
with the channel and sub channel in the available·
state, the instruction mayor may not clear the inter­
ruption condition, depending on the type of error
and the model. If the instruction has caused the de­
vice to be interrogated, as indicated by the presence
of the busy bit in the CSW, the interruption condi­
tion has been cleared, and the CSW contains pro­
gram or protection check, as well as the status from
the device.
Two major differences exist between START I/O and START I/O FAST RELEASE:
1. N onchained immediate commands on certain
channels (that is, those which execute START 206 System/370 Principles of Operation
1/ 0 FAST RELEASE independently of the
device) result in a condition code 0 for START I/O FAST RELEASE when the block­
multiplexing control bit is set to one, whereas
condition code 1 is set for START I/O. See
also programming note 2 following" Command Retry." 2. Condition code 0 is set by these certain chan­
nels for START I/O FAST RELEASE when
the block-multiplexing control bit is set to one,
even though the addressed device is not avail­
able or the command is rejected by the device.
The device information will be supplied by
means of an interruption.
Store Ch.annel 1D
STIDC [S] B203 o 16 20 Information identifying the designated channel is
stored in the four-byte field at location 168. STORE CHANNEL ID is executed only when
the CPU is in the supervisor state.
31
Bits 16-23 of the second-operand address identify
the channel to which the instruction applies. Bit posi­
tions 24-31 of the address are ignored.
The format of the information stored at location
168 is: