Channel Command Word
The channel command word (CCW) specifies the
command to be executed and, for commands initiat­
ing I/O operations, it designates the storage area
associated with the operation and the action to be
taken whenever transfer to or from the area is com­
pleted. The CCWs can be located anywhere in main
storage, and more than one can be associated with a
START I/O or START I/O FAST RELEASE.
The first CCW is fetched during the execution of
ST ART I/O or START I/O FAST RELEASE being
executed as START I/O. When START I/O FAST
RELEASE is executed independently of the device,
the first CCW is fetched subsequent to the execution
of START I/O FAST RELEASE. Each additional
CCW in the sequence is obtained when the opera­
tion has progressed to the point where the additional
CCW is needed. Fetching of the CCWs by the chan­
nel does not affect the contents of the location in
main storage.
The CCW has the following format:
Command
Code
o 8 I Flags 32 38 40 Data Address
48
31
Count
The fields in the CCW are allocated for the follow­
ing purposes: C()mmand Code: Bits 0-7 specify the operation to
be performed.
63
Data Address: Bits 8-31 specify the location of an
eight-bit byte in absolute main storage. It is the first
location referred to in the area designated by the
CCW.
Chain-Data (CD) Flag: Bit 32, when one, specifies
chaining of data. It causes the storage area designat­
ed by the next CCW to be used with the current
operation.
Chain-Command (CC) Flag: Bit 33, when one, and
when the CD flag is zero, specifies chaining of com­
mands. It causes the operation specified by the com­
mand code in the next CCW to be initiated on nor­
mal completion of the current operation.
Suppress-Length-Indication (SLI) Flag: Bit 34 con­
trols whether an incorrect-length condition is to be
indicated to the program. When this bit is one and
the CD flag is zero, the incorrect-length indication is
suppressed. When both the CC and SLI flags are
one, command chaining takes place regardless of the
presence of an incorrect-length condition.
Skip (SKIP) Flag: Bit 35, when one, specifies sup­
pression of transfer of information to storage during
a read, read backward, or sense operation.
Program-Controlled-Interruption (PCI) Flag: Bit
36, when one, causes the channel to generate an
interruption condition when the CCW takes control
of the channel. When bit 36 is zero, normal opera­
tion takes place.
Indirect Data Address (IDA) Flag: Bit 37, when
one, specifies indirect data addressing. (The flag is
valid in both BC and EC modes.)
Count: Bits 48-63 specify the number of eight-bit
byte locations in the storage area designated by the
CCW.
Bit positions 38-39 of every CCW other than one
specifying transfer in channel must contain zeros.
Additionally, if indirect addressing is specified, bits 30-31 of the CCW must be zeros, indicating a word
boundary, and bits 0-7 of the first entry of the indi­
rect data address list must be zeros. (See "Channel
Indirect Data Addressing.") Otherwise, a program­
check condition is generated. When the first CCW
designated by the CAW does not contain the re­
quired zeros, the I/O operation is not initiated, and
the status portion of the CSW with the program­
check indication is stored during execution of
ST ART I/O or, if being executed as START I/O, ST ART I/O FAST RELEASE. Detection of this
condition during data chaining causes the I/O device
to be signaled to conclude the operation. When the
absence of these zeros is detected during command
chaining or subsequent to the execution of START I/O FAST RELEASE, the new operation is not
initiated, and an interruption condition is generated.
The contents of bit positions 40-47 of the CCW
are ignored.
Programming Note
Bit positions 38-39 of the CCW, which presently
must contain zeros, may in the future be assigned for
the control of new functions. It is therefore recom­
mended that these bit positions not be set to one for
the purpose of obtaining a program-check indication. Input/Output Operations 21 t

Command Code
The command code, bit positions 0-7 of the CCW,
specifies to the channel and the I/O device the oper­
ation to be performed. A detailed description of each
command appears under" Commands. " The two low-order bits or, when these bits are 00, the four low-order bits of the command code identi­
fy the operation to the channel. The channel distin­
guishes among the following four operations: Output forward (write, control)
Input forward (read, sense)
Input backward (read backward)
Branching (transfer in channel)
The channel ignores the high-order bits of the
command code.
Commands that initiate I/O operations (write,
read, read backward, control, and sense) cause all
eight bits iQf the command code to be transfened to
the I/O device. In these command codes, the high­
order bit positions contain modifier bits. The modifi­
er bits specify to the device how the command is to
be executed. They may cause, for example, the de­
vice to compare data received during a write opera­
tion with data previously recorded, and they may
specify such conditions as recording density and
parity. For the control command, the modifer bits
may contain the order code specifying the control
function to be performed. The meaning of the modi­
fier bits depends on the type of I/O device and is
specified in the SL or SRL publication for the de­
vice.
The command -code assignment is listed in the
following table. The symbol x indicates that the bit
position is ignored; m identifies a modifier bit. Code Command xxxx 0000 Invalid mmmm 0100 Sense
xxx x 1000 Transfer in Channel mmmm 1100 Read Backward
mmmm mm01 Write
mmmm mm10 Read
mrnmm mm11 Control Whenever the channel detects an invalid com­
mand code during the initiation of a command, the
program-check condition is generated. When the
first CCW designated by the CAW contains an in­
valid command code, the status portion of the CSW with the program-check indication is stored during
execution of START I/O or, if being executed as START I/O, START I/O FAST RELEASE. When
the invalid code is detected during command chain­
ing or subsequent to the execution of ST ART I/O FAST RELEASE, the new operation is not initiated,
and an interruption condition is generated. The com-
212 System/370 Principles of Operation manq code is ignored during data chaining, unless it
specifies transfer in channel.
Designation of Storage Area Note: For a description of the storage area associat­
ed with a CCW when channel indirect data address­
ing is invoked, see "Channel Indirect Data Address-
. " .' mg.
The main-storage area associated with an I/O operation is defined by one or more CCWs. A CCW
defines an area by specifying the address of the first
eight-bit byte to be transferred and the number of
consecutive eight-bit bytes contained in the area.
The address of the first byte appears in the data­
address field of the CCW. The number of bytes con­
tained in the storage area is specified in the count
field.
In write, read, control, and sense operations stor­
age locations are used in ascending order of address­
es. As information is transferred to or from main
storage, the address from the address field is incre­
mented, and the count from the count field is decre­
mented. The read-backward operation places data in
storage in a descending order of addresses, and both
the count and the address are decremented. When
the count reaches zero, the storage area defined by
the CCW is exhausted.
Any main-storage location available to the chan­
nel can be used in the transfer of data to or from an I/O device, provided that the location is not protect­
ed against the type of reference. Similarly, the
CCWs can be located in any part of available main
storage, provided the location is not protected
against a fetch-type reference. When the channel
attempts to refer to a protected location, the protec­
tion check condition is generated, and the device is
signaled to terminate the operation.
In the event the channel refers to a location not
provided in the system, the program-check condition
is generated. When the first CCW designated by the
CAW is at a nonexistent location, the I/O operation
is not initiated, and the status portion of the CSW with the program-check indication is stored during
the execution of START I/O or ST ART I/O FAST RELEASE being executed as START I/O. Invalid
data addresses, as well as any invalid CCW address­
es detected on chaining or subsequent to the execut­
ing of START I/O FAST RELEASE, are indicated
to the program with the interruption conditions at
the conclusion of the operation or chain of opera­
tions.
During an output operation, the channel may
fetch data from the main storage before the time the I/O device requests the data. Any number of bytes