Defe"ed Condition Code (CC): Bits 6 and 7 indi
cate whether conditions have been encountered sub
sequent to the setting of a condition code0 for
STARTI/O FAST RELEASE that would have
caused a different condition code setting for STARTI/O. The possible setting of these bits, and their
meanings, are as follows:Setting Of Bit 6
o
o
Bit 7
o
1
o
MeaningNormal I/O interruption
Deferred condition code is 1
(Reserved)
Deferred condition code is 3
CCW Address: Bits 8-31 form an absolute address
that is eight higher than the address of the last CCW
used.
Status: Bits 32-47 identify the conditions in the de
vice and the channel that caused the storing of the
CSW. Bits 32-39, the unit status, are obtained over
theI/O interface and indicate conditions detected
by the device or the control unit. Bits 40-47, the
channel status, are provided by the channel and indi
cate conditions associated with the subchannel. Each
of the 16 bits represents one type of condition, as
follows:
Bit Designation
32 Attention
33Status modifier
34Control unit end
35 Busy
36Channel end
37 Device end
38 Unit check
39 Unit exception40 Program-controlled interruption
41I ncorrect length 42 Program check
43 Protection check
44Channel data check
45Channel control check
46I nterface control check
47 Chaining check
Count: Bits 48-63 form the residual count for the
last CCW used.
Unit Status Conditions
The following conditions are detected by theI/O device or control unit and are indicated to the chan
nel over theI/O interface. The timing and causes of
these conditions for each type of device are specified
in the SL or SRL publication for the device.
When theI/O device is accessible from more
than one channel, status due to channel-initiated
operations is signaled to the channel that initiated
the associatedI/O operation. The handling of condi
tions not associated withI/O operations, such as
attention or device end due to transition from the
not-ready to the ready state, depends on the type of
device and condition and is specified in the SL or
SRL publication for the device.
The channel does not modify the status bits re
ceived from theI/O device. These bits appear in the
CSW as received over the interface.
Attention
Attention is generated when the device detects an
asynchronous condition that is significant to the
program. The condition is interpreted by the pro
gram and is not associated with the initiation, execu
tion, or concluding of anI/O operation.
The device can signal the attention condition to
the channel when no operation is in progress at theI/O device, control unit, or subchannel. Attention
can be indicated with device end upon completion of
an operation, and it can be presented to the channel
during the initiation of a newI/O operation. Other wise, the handling and presentation of the condition
to the channel depends on the type of device.
When the device signals attention during the initi
ation of an operation, the operation is not initiated.
Attention accompanying device end causes com
mand chaining to be suppressed.
Status Modifier
Status modifier is generated by the device when the
device cannot provide its current status in response
to TESTI/O, when the control unit is busy, when
the normal sequence of commands has to be modi
fied, or when command retry is to be initiated.
When the status-modifier condition is signaled in
response to TESTI/O and the bit appears in the
CSW in the absence of any other status bit, presence
of the bit indicates that the device cannot execute
the instruction and has not provided its current sta
tus. The interruption condition, which may be pend
ing at the device or subchannel, has not been
cleared, and the CSW stored by TESTI/O contains
zeros in the key, command address, and count fields.
The 2702 Transmission Control is an example of a
type of device that cannot execute TESTI/O. When the status-modifier bit appears in the CSW
together with the busy bit, it indicates that the busy
condition pertains to the control unit associated with
the addressedI/O device. The control unit appears
busy when it is executing a type of operation that
precludes the acceptance and execution ofany com-
Input/Output Operations 229
cate whether conditions have been encountered sub
sequent to the setting of a condition code
START
caused a different condition code setting for START
meanings, are as follows:
o
o
Bit 7
o
1
o
Meaning
Deferred condition code is 1
(Reserved)
Deferred condition code is 3
CCW Address: Bits 8-31 form an absolute address
that is eight higher than the address of the last CCW
used.
Status: Bits 32-47 identify the conditions in the de
vice and the channel that caused the storing of the
CSW. Bits 32-39, the unit status, are obtained over
the
by the device or the control unit. Bits 40-47, the
channel status, are provided by the channel and indi
cate conditions associated with the subchannel. Each
of the 16 bits represents one type of condition, as
follows:
Bit Designation
32 Attention
33
34
35 Busy
36
37 Device end
38 Unit check
39 Unit exception
41
43 Protection check
44
45
46
47 Chaining check
Count: Bits 48-63 form the residual count for the
last CCW used.
Unit Status Conditions
The following conditions are detected by the
nel over the
these conditions for each type of device are specified
in the SL or SRL publication for the device.
When the
than one channel, status due to channel-initiated
operations is signaled to the channel that initiated
the associated
tions not associated with
attention or device end due to transition from the
not-ready to the ready state, depends on the type of
device and condition and is specified in the SL or
SRL publication for the device.
The channel does not modify the status bits re
ceived from the
CSW as received over the interface.
Attention
Attention is generated when the device detects an
asynchronous condition that is significant to the
program. The condition is interpreted by the pro
gram and is not associated with the initiation, execu
tion, or concluding of an
The device can signal the attention condition to
the channel when no operation is in progress at the
can be indicated with device end upon completion of
an operation, and it can be presented to the channel
during the initiation of a new
to the channel depends on the type of device.
When the device signals attention during the initi
ation of an operation, the operation is not initiated.
Attention accompanying device end causes com
mand chaining to be suppressed.
Status Modifier
Status modifier is generated by the device when the
device cannot provide its current status in response
to TEST
the normal sequence of commands has to be modi
fied, or when command retry is to be initiated.
When the status-modifier condition is signaled in
response to TEST
CSW in the absence of any other status bit, presence
of the bit indicates that the device cannot execute
the instruction and has not provided its current sta
tus. The interruption condition, which may be pend
ing at the device or subchannel, has not been
cleared, and the CSW stored by TEST
zeros in the key, command address, and count fields.
The 2702 Transmission Control is an example of a
type of device that cannot execute TEST
together with the busy bit, it indicates that the busy
condition pertains to the control unit associated with
the addressed
busy when it is executing a type of operation that
precludes the acceptance and execution of
Input/Output Operations 229








































































































































































































































































































































