Central Processing Unit Every CPU incorporates the commercial instruction
set, which includes the standard instruction set and
the decimal instructions (listed in Appendix C), and
the associated basic computing functions, including:• Byte-oriented operands • General registers • Control registers, with bit positions "for the
block-multiplexing control bit (if block multi
plexing is provided), for the interrupt-key and
interval-timer masks, for channel masks associ
ated with installed channels, for monitor
masks, for control of installed machine-check
handling facilities, and for theIOEL control (if
an installed channel has the I/O-extended
logout facility).• Storage protection • Interval timer • Time-of -day clock • Basic system console functions
Additionally, the following features are available:
Floating-Point Feature
Includes the floating-point instructions (listed in
Appendix C) and the floating-point registers.
Universal InstructionSet Includes the instructions of the commercial instruc
tion set and the floating-point feature.
Extended-Precision Floating-Point Feature
Includes the extended-precision floating-point in
structions (listed in Appendix C).
External-Signal Feature
Includes the extension to external interruptions for
external signals, the control-register position for the
external-signal mask, and the means to accept exter-, nal signals.
Direct-Control Feature
Includes the external-signal feature and the instruc
tions READ DIRECT and WRITE DIRECT.
CPU-Timer and Clock-Comparator Feature
Includes the clock comparator, theCPU timer, the
associated extensions to external interruption,
control-register positions for the clock-comparator
and CPU-timer masks, and these instructions:SET Appendix A. System/370 Features CLOCK COMPARATOR, STORE CLOCK COM PARATOR, SET CPU TIMER, and STORE CPU TIMER.
Translation Feature
Includes the following facilities:• Dynamic Address Translation (DAT). The
DAT facility includes the translation mecha
nism, with the associated control-register posi
tions and program-interruption codes, and ref
erence and change recording.• Program-Event Recording (PER). The PER
facility includes the associated control-register
positions and extensions to the program
interruption code.• Extended-Control (EC) Mode. • SSM Suppression. This facility includes the
control-register position for theSSM suppression-control bit and the program
interruption code for special operation.• Store Status and Program Reset.
As part of these facilities, the following instruc
tions are provided:LOAD REAL ADDRESS, PURGE TLB, RESET REFERENCE BIT, STORE THEN AND SYSTEM MASK, and STORE THEN OR SYSTEM MASK. Multiprocessing Feature
Includes the following facilities, which permit the
formation of a two-CPU multiprocessing system:• Shared Main Storage. • Prefixing. • CPU Signaling and Response. • TOD Clock Synchronization.
These facilities include four extensions to external
interruption (external call, emergency signal,TOD clock sync check, and malfunction alert), control
register positions for the TOD-clock-sync control bit
and for the masks for the four external-interruption
conditions, and the instructionsSET PREFIX, SIG NAL PROCESSOR, STORE CPU ADDRESS, and STORE PREFIX.
Conditional-Swapping Feature
Includes the instructionsCOMPARE AND SW AP
andCOMPARE DOUBLE AND SWAP. PSW-Key-Handling Feature
Includes the instructionsSET PSW KEY FROM ADDRESS and INSERT PSW KEY.
Appendix A. System/370 Features 249
set, which includes the standard instruction set and
the decimal instructions (listed in Appendix C), and
the associated basic computing functions, including:
block-multiplexing control bit (if block multi
plexing is provided), for the interrupt-key and
interval-timer masks, for channel masks associ
ated with installed channels, for monitor
masks, for control of installed machine-check
handling facilities, and for the
an installed channel has the I/O-extended
logout facility).
Additionally, the following features are available:
Floating-Point Feature
Includes the floating-point instructions (listed in
Appendix C) and the floating-point registers.
Universal Instruction
tion set and the floating-point feature.
Extended-Precision Floating-Point Feature
Includes the extended-precision floating-point in
structions (listed in Appendix C).
External-Signal Feature
Includes the extension to external interruptions for
external signals, the control-register position for the
external-signal mask, and the means to accept exter-
Direct-Control Feature
Includes the external-signal feature and the instruc
tions READ DIRECT and WRITE DIRECT.
CPU-Timer and Clock-Comparator Feature
Includes the clock comparator, the
associated extensions to external interruption,
control-register positions for the clock-comparator
and CPU-timer masks, and these instructions:
Translation Feature
Includes the following facilities:
DAT facility includes the translation mecha
nism, with the associated control-register posi
tions and program-interruption codes, and ref
erence and change recording.
facility includes the associated control-register
positions and extensions to the program
interruption code.
control-register position for the
interruption code for special operation.
As part of these facilities, the following instruc
tions are provided:
Includes the following facilities, which permit the
formation of a two-CPU multiprocessing system:
These facilities include four extensions to external
interruption (external call, emergency signal,
register positions for the TOD-clock-sync control bit
and for the masks for the four external-interruption
conditions, and the instructions
Conditional-Swapping Feature
Includes the instructions
and
Includes the instructions
Appendix A. System/370 Features 249








































































































































































































































































































































