gram in the CCWs used for the IPL sequence are
ignored. If the device-end status for the IPL opera­
tion is provided separately after channel-end status,
it causes an 110 interruption condition to be generat­
ed. If'the IPL 110 operation or the PSW loading is
not completed satisfactorily, the CPU idles, and the
load indicator remains on. This occurs when the
device designated by the address set up on the load­
unit-address switches is not operational, when the
device or channel signals any condition other than
channel end, device end, or status modifier during or
at the completion of the IPL II 0 operation, or when
the PSW loaded from location 0 has a format error
that is recognized during the loading procedure. The
address of the 110 device used in the IPL operation
is not stored. The contents of locations 0-7 are un­
predictable, but the contents of other main-storage
locations remain unchanged. When less than eight
bytes are read into the doubleword at location 0, the PSW fetched from location 0 at the conclusion of
the IPL operation is unpredictable.
Programming Notes
The information read into locations 8-15 and 16-23
may be used as CCWs for reading additional infor­
mation during the IPL sequence: the CCW at location
8 may specify reading additional CCW s elsewhere in
main storage, and the CCW at location 16 may speci­
fy the transfer-in-channel command, causing trans­
fer to these CCWs.
The status-modifier bit has its normal effect dur­
ing the IPL operation, causing the channel to fetch
and chain to the CCW whose main-storage address
is 16 higher than that of the current CCW. This ap­
plies also to the initial chaining that occurs after
completion of the read operation specified by the
implicit CCW.
The PSW that is loaded at the completion of the IPL procedure may be provided by the first eight
bytes of the IPL 110 operation or may be read into
locations 0-7 by a subsequent CCW.
The IPL 110 operation implicitly specifies the use
of the first 24 bytes of main storage. Since the re­
mainder of the IPL program may be placed in any
part of storage, it is possible to preserve such areas
of storage as the PSW and logout areas, which may
be helpful in recovery.
When the PSW in location 0 has bit 14 set to one,
the CPU is placed in the wait state after the IPL procedure is completed; at that point, the manual
indicator is off, and the wait indicator is on. System Control 55
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