Mask Bits PSW Mask in Control Source Interruption
Bits Registers
Execution of Instruction
Identification Code
BC EC Register BitILC Set Identified by Old PSW ----
Machine check (oldPSW 48, new PSW 112)
Exigent condition mmmmmmmm mmmmmmmm
1
13 13 x terminated or nullified
7
Repressible condo mmmmmmmm mmmmmmmm
1
13 13 14 4-7 x unaffected
7
Supervisorcall (old PSW 32, new PSW 96) I nstruction bits 00000000 rrrrrrrr 1,2 completed
Program(old PSW 40, new PSW 104) Operation 00000000 nOOOOO01 1,2,3 suppressed
Privileged oper.00000000 nooOO010 1,2 suppressed
Execute00000000 nOOOO011 2 suppressed
Protection00000000 riOOO0100 0,1,2,3 suppressed or terminated
Addressing00000000 nOOO0101 0,1,2,3 suppressed or terminated
Specification00000000 nOOO0110 0,1,2,3 suppressed or completed
Data00000000 nOOOOlll 2,3 suppressed or terminated
Fixed-pt. overflow00000000 nOO01000 36 20 1,2 completed
Fixed-point divide00000000 nOO01001 1,2 suppressed or completed
Deci mal overflow00000000 nOO01010 37 21 2,3 completed
Decimal divide00000000 nOO01011 2,3 suppressed
Exponent overflow00000000 nOO01100 1,2 completed
Exponent underflow00000000 nOO01101 38 , 22 1,2 completed SignificancE! 00000000 nOOOll10 39 23 1,2 completed
Floating-pt. divide00000000 nOO01111 1,2 suppressed
Segment transl.00000000 n0010000 1,2,3 nullified
Page translation00000000 n0010001 1,2,3 nullified
Translation spec00000000 n0010010 1,2,3 suppressed
Specialopelration 00000000 n00100ll 0 2 suppressed
Monitorevent 00000000 nl000000 8 16+ 2 completed
Programevont 00000000 leOeeeee
2 9 0-3 0,1,2,3 completed
3
External(old PSW 24, new PSW 88) Interval timer 00000000 lnnnnnnn 7 7 0 24 x unaffected I Interrupt kE!y 00000000 nlnnnnnn 7 7 0 25 x unaffected
External signal 200000000 nn1nnnnn 7 7 0 26 x unaffected
External signal 300000000 nnnlnnnn 7 7 0 26 x unaffected
External signal 400000000 nnnn1nnn 7 7 0 26 x unaffected
External signal 500000000 nnnnn1nn 7 7 0 26 x uriaffected
External signal 600000000 nnnnnn1n 7 7 0 26 x unaffected
External signal 700000000 nnnnnnn1 7 7 0 26 x unaffected
Malfunction alert00010010 00000000 7 7 0 16 x unaffected
Emergency signal00010010 00000001 7 7 0 17 x unaffected
External call00010010 00000010 7 7 0 18 x unaffected TOO clock sync chk 000.10000 00000011 7 7 0 19 x unaffected
Clock comparator00010000 00000100 7 7 0 20 x unaffected
CPU timer00010000 00000101 7 7 0 21 x unaffected Input/Output (old PSW 56, new PSW 120) Channel 0 00000000 dddddddd
40 6 2 0
5 x unaffected
Channell00000001 dddddddd
4
1 6 2 1
5
x unaffected
Channel 200000010 dddddddd
4
2 6 2 2
5
x unaffected
Channel 300000011 dddddddd
4
3 6 2 3
5
x unaffected
Channel 400000100 dddddddd
4
4 6 2 4
5
x unaffected
Channel 500000101 dddddddd
4
5 6 2 55 x unaffected
Channels 6c31 on cccccccc dddddddd
4
6 6 2 6+ x unaffected
Restart (oldPSW 8, new PSW 0) Restart key 00000000 00000000
6 x unaffected
Interruption Action
72 System/370 Principles ofOperation
Bits Registers
Execution of Instruction
Identification Code
BC EC Register Bit
Machine check (old
Exigent condition mmmmmmmm mmmmmmmm
1
13 13 x terminated or nullified
7
Repressible condo mmmmmmmm mmmmmmmm
1
13 13 14 4-7 x unaffected
7
Supervisor
Program
Privileged oper.
Execute
Protection
Addressing
Specification
Data
Fixed-pt. overflow
Fixed-point divide
Deci mal overflow
Decimal divide
Exponent overflow
Exponent underflow
Floating-pt. divide
Segment transl.
Page translation
Translation spec
Special
Monitor
Program
2
3
External
External signal 2
External signal 3
External signal 4
External signal 5
External signal 6
External signal 7
Malfunction alert
Emergency signal
External call
Clock comparator
CPU timer
4
5
Channell
4
1 6 2 1
5
x unaffected
Channel 2
4
2 6 2 2
5
x unaffected
Channel 3
4
3 6 2 3
5
x unaffected
Channel 4
4
4 6 2 4
5
x unaffected
Channel 5
4
5 6 2 55 x unaffected
Channels 6
4
6 6 2 6+ x unaffected
Restart (old
6
Interruption Action
72 System/370 Principles of