instruction, for a unit of operation that is sup­
pressed or nullified.
4. When the execution of the instruction is termi­
nated, general-register and storage alteration is
indicated whenever the event has occuned. Additionally, a model may indicate the event if
the event would have occurred had the execu­
tion of the instruction been completed, even if
altering the contents of the result field is con­
tingent on operand values.
5. When LOAD PSW or SUPERVISOR CALL
causes a PER condition and at the same time
introduces a new PSW with the type of format
error that is recognized immediately after the PS"'N becomes active, the interruption code
identifies both the PER condition and the
specification exception. When these instruc­
tions introduce a PSW format error of the type
that is recognized as part of the execution of
the following instruction, the PSW is stored as
the old PSW without the exception being rec­
ognized.
The indication of program events concurrently
with other program interruption conditions is sum­
marized in the table "Indication of Program
Events."
Programming Notes
The execution of the interruptible instructions MOVE LONG (MVCL) and COMPARE LOGI­ CAL LONG (CLCL) can cause events for general­
register alteration and instruction fetch. Additional­
ly, MVeL can cause the storage-alteration event.
Since the execution of MVCL and CLCL can be
interrupted, a program event may be indicated more
than on(:e. It may be necessary, therefore, for a pro­
gram to remove the redundant event indications
from PER data. The following rules govern the
44 System/370 Principles of Operation
indication of the applicable events during execution
of these two instructions:
1. The instruction-fetching event is indicated
whenever the instruction is fetched for execu­
tion, regardless of whether it is the initial exe­
cution or resumption.
2. The general-register-alteration event is indicat­
ed on initial execution and on each resumption
and does not depend on whether or not the
register actually is changed.
3. The storage-alteration event is indicated only
when data has been stored in the monitored
area by the portion of the operation starting
with the last initiation and ending with the last
byte transferred before the interruption. No
special indication is provided on premature
interruptions as to whether the event will occur
again upon the resumption of the operation.
The event for address match on data storing
for a single byte location can be recognized
only once in the execution of MOVE LONG. The following is an outline of the general action a
program must take to delete the redundant entries in
the PER data for MOVE LONG and COMPARE LOGICAL LONG so that only one entry for each
complete execution of the instruction is obtained:
1. Check to see if the PER address is equal to the
instruction address in the old PSW and if the
last instruction executed was MVCL or CLCL.
2. If both conditions are met, delete instruction­
fetching and register-alteration events.
3. If both conditions are met, and the event is
storage alteration, delete the event if the cur­
rent destination-operand address is within the
monitored area and the count for the destina­
tion operand is not zero.

PER Event
Exception Type Of Ending S Branch Instruction Fetch
Storage Alter Operation Privileged Operation
Execute
Protection Instruction Operand OAT entry for instruction address Instruction OAT entry for operand address Operand Specification Odd instruction address Invalid PSW format Other Data I nvalid sign Other Fixed-Point Overflow Fixed-Point Divide
Division
Conversion Decimal Overflow Decimal Divide
Exponent Overflow Exponent Underflow Significance
Floating-Point Divide
Segment Translation I nstruction address translation Operand address translation Page Translation I nstruction address translation Operand address translation Translation Specification I nstruction address translation Operand address translation Special Operation
Monitor Event Explanation: S S S SorT S S S SorT S C S S T
C S C
C S C
C
C S N
N
N
N S S S C
2
2
2
2
2
x
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1
1
1
X
X
1
X
X
X
C
The operation or, in the case of the interruptible instructions, the unit of operation is completed. N
The operation or, in the case of the interruptible instructions, the unit of operation is nullified. The instruction address in the old PSW has not been updated. S The 9peration or, in the case of the interruptible instructions, the unit of operation is suppressed.
T The execution of the instrL!ction is terminated.
X+
X3
X+
X+
X General Register Alteration X+
X3
X+
X+
X
X
X The event is indicated along with the exception if the event has occurred; that is, the contents of the monitored storage location or general register changed, or an attempt was made to execute an instruction whose first byte is located in the monitored area.
+ A model may indicate the event, but does not necessarily, if the event was called for (would have occurred had the
operation been completed) but the event did not take place because the execution of the instruction was terminated.
The event is not indicated.
When an access exception applies to the second or third halfword of the instruction but the first halfword is accessible, it is unpredictable whether the instruction-fetching event is indicated.
2 This condition may occur for some special-purpose instructions, such as those provided for emulation. 3 This condition may occur in the case of the interruptible instructions when the event is recognized in the unit of
operation that is completed and when the exception causes the next unit of operation to be suppressed or nullified. Indication of Program Events
System Control 45