Programming Notes
TheORing of eight bits from the general register
with the designated instruction permits indirect
length, index, mask, immediate data, and arithmetic
register specification.
If the subject instruction is a successful branch,
the length code still stands at 2.
An addressing or specification exception may be
caused by EXECUTE or by the subject instruction.
When an interruptible instruction is made a sub
ject of EXECUTE, the program normally should not
designate any register updated by the interruptible
instruction as either the Rl, X2, or B2 register forEXECUTE, since on resumption of execution after
an interruption, or if the instruction is refetched
without an interruption, the updated values of these
registers will be used in the execution of EXECUTE.
Similarly, the program should normally not let the
destination field of an interruptible instruction in
clude the location of the EXECUTE, since the new
contents of the location may be interpreted for a
resumption of the execution.
Insert Character
[RX]
The byte at the second-operand location is inserted
into bit positions 24-31 of the general register desig
nated by the Rl field. The remaining bits in the reg
isterremain unchanged. ContJ'ition COde: The code remains unchanged. Exceptions: Aecess (fetch, operand 2)
Inse'rt Characters Under Mask
Bytes from contiguous locations beginning at the
second-operand address are inserted into the firstoperand location under control of a mask.
31The contents of the M3 field, bit positions 12-15,
areused as a mask. The four bits of the mask, left to
right, correspond one for one with the four bytes,130 System/370 Principles of Operation left to right, of the general register designated by the
Rl field. The byte positions corresponding to ones in
the mask are filled, in the order of ascending byte
numbers, with bytes from the storage operand. Bytes
are fetched from contiguous storage locations begin
ning at the second-operand address. The length of
the second operand is equal to the number of ones in
the mask. The bytes in the general register corre
sponding to zeros in the mask remain unchanged.
The resulting condition code is based on the mask
and on the value of the bits inserted. When the mask
is zero or when all inserted bits are zero, the condi
tion code is madeO. When all inserted bits are not
zero, the code is set according to the leftmost bit of
the storage operand: if this bit is one, the code is
made 1 to indicate a negative algebraic value; if this
bit is zero, the code is made 2, reflecting a positive
algebraic value.
When the mask is not zero, exceptions associated
with storage operand access are recognized only for
the number of bytes specified by the mask. When
the mask is zero, access exceptions are recognized
for one byte.
Resulting Condition Code:
o All inserted bits are zeros, or mask is zero
1 First bit of the inserted field is one
2 First bit of the inserted field is zero, and not all
inserted bits are zeros
3 -
Program Exceptions:
Access (fetch, operand 2)
Programming Note
The condition code for INSERT CHARACTERS
UNDER MASK is defined such that when the mask
is 1111, the instruction causes the same condition
code to be set as forLOAD AND TEST.
Load
[RR]
o 8 12 15
L [RX]
58
o 8 12 1620 31
The second operand is placed unchanged in the first
operand location.
The
with the designated instruction permits indirect
length, index, mask, immediate data, and arithmetic
register specification.
If the subject instruction is a successful branch,
the length code still stands at 2.
An addressing or specification exception may be
caused by EXECUTE or by the subject instruction.
When an interruptible instruction is made a sub
ject of EXECUTE, the program normally should not
designate any register updated by the interruptible
instruction as either the Rl, X2, or B2 register for
an interruption, or if the instruction is refetched
without an interruption, the updated values of these
registers will be used in the execution of EXECUTE.
Similarly, the program should normally not let the
destination field of an interruptible instruction in
clude the location of the EXECUTE, since the new
contents of the location may be interpreted for a
resumption of the execution.
Insert Character
[RX]
The byte at the second-operand location is inserted
into bit positions 24-31 of the general register desig
nated by the Rl field. The remaining bits in the reg
ister
Inse'rt Characters Under Mask
Bytes from contiguous locations beginning at the
second-operand address are inserted into the first
31
are
right, correspond one for one with the four bytes,
Rl field. The byte positions corresponding to ones in
the mask are filled, in the order of ascending byte
numbers, with bytes from the storage operand. Bytes
are fetched from contiguous storage locations begin
ning at the second-operand address. The length of
the second operand is equal to the number of ones in
the mask. The bytes in the general register corre
sponding to zeros in the mask remain unchanged.
The resulting condition code is based on the mask
and on the value of the bits inserted. When the mask
is zero or when all inserted bits are zero, the condi
tion code is made
zero, the code is set according to the leftmost bit of
the storage operand: if this bit is one, the code is
made 1 to indicate a negative algebraic value; if this
bit is zero, the code is made 2, reflecting a positive
algebraic value.
When the mask is not zero, exceptions associated
with storage operand access are recognized only for
the number of bytes specified by the mask. When
the mask is zero, access exceptions are recognized
for one byte.
Resulting Condition Code:
o All inserted bits are zeros, or mask is zero
1 First bit of the inserted field is one
2 First bit of the inserted field is zero, and not all
inserted bits are zeros
3 -
Program Exceptions:
Access (fetch, operand 2)
Programming Note
The condition code for INSERT CHARACTERS
UNDER MASK is defined such that when the mask
is 1111, the instruction causes the same condition
code to be set as for
Load
[RR]
o 8 12 15
L [RX]
58
o 8 12 16
The second operand is placed unchanged in the first
operand location.