Branch on Count (BCT, BCTR)
The BRANCH ON COUNT instructions are often used to
execute a program loop for a specified number of times.
For example, assume that the following represents some lines
of coding in an assembly-language program: LUPE AR8,!
BACK BCT 6,LUPE where register 6 contains 00 00 00 03 and the address of LUPE is 6826. Assume that, in order to address this loca­ tion, register lOis used as a base register and contains 00 00 68 00. The format of the BCT instruction is:
Machine Format
46 I 6 I 0 I A 026 Assembler Format Op Code R
1
, D2 (X
2
, B
2
)
BCT 6,X'26'(O,10) The effect of the coding is to execute three times the loop
defined by locations LUPE through BACK.
Branch on Index High (BXH)
The BRANCH ON INDEX HIGH instruction is an index­ incrementing and loop-controlling instruction that causes a
branch whenever the sum of an index value and an increment
value is greater than some comparand. For example, assume
that:
Register 4 contains 00 00 00 8A = 13810 = the index
Register 6 contains 00 00 00 02 = 2
1
0 = the increment
Register 7 contains 00 00 00 AA = 17010 = the comparand
Register 10 contains 00 00 71 30 = the branch address
The format of the instruction is:
Machine Format
86 I 4 I 6 I A 000 Assembler Format Op Code R
1
, R
3
, D2 (B
2
)
BXH 4,6,0(10) When the instruction is executed: first, the contents of
register 6 are added to register 4; second, the sum is com­ pared with the contents of register 7; and third, the deci­ sion to branch is made. After execution:
Register 4 contains 00 00 00 8C=140 10 Registers 6 and 7 are unchanged
Since the new value in register 4 is not greater than the
value in register 7, the branch to address 7130 is not taken.
When the register used to contain the increment is odd,
that register also becomes the comparand register. The fol­ lowing assembly-language routine illustrates how this fea­ me may be used to search a table:
Table
Two Bytes Two Bytes
ARG1 FUNCT1
ARG2 FUNCT2
ARG3 FUNCT3
ARG4 FUNCT4
ARG5 FUNCT5
ARG6 FUNCT6
Assume that:
Register 0 contains the search argument
Register 1 contains the width of the table in bytes (00 00 00 04) Register 2 contains the length of the table in bytes (00 00 00 18)
Register 3 contains the starting address of the table
Register 14 contains the return address to the main program
As the following subroutine is executed, the argument in
register 0 is successively compared with the arguments in
the table, starting with argument 6 and working backwards
to argument 1. If an equality is found, the corresponding
function replaces the argument in register O. If an equality
is not found, FF 16 replaces the argument in register O. The first instruction (LNR) causes the value in register 1
to be made negative. After execution of this instruction,
register 1 contains FFFFFFFC = -4 10 , Considering the
case when no equality is found, the BXH instruction will
be executed seven times. Each time the BXH is executed,
a value of -- 4 is added to register 2, thus reducing the
value in register 2 by 4. The new value in register 2 is com­ pared with the -4 value in register l. Thus the branch is
taken each time until the value in register 2 is -4.
SEARCH LNR 1, 1 NOTEQUAL BXH 2,1, LOOP NOTFOUND LA 0, X'FF'
BCR 15, 14 LOOP CH 0,0(2,3) BC 7, NOTEQUAL LH 0,2 (2,3)
BCR 15,14
Branch on I ndex low or Equal (BXlE)
This instruction is similar to BRANCH ON INDEX HIGH
except that the branch is successful when the sum is low
or equal compared to the comparand.
Appendix I. Number Representation and Instruction-Use Examples 293

Compare Halfword (CH)
The COMPARE HALFWORD instruction compares a half­ word in storage with the contents of a register. For example,
assume that:
Register 44 contains FF FF 80 00 = -32,768
10
Register 13 contains 00 01 60 50 Storage lQ(;ations 16080-16081 contain 8000 = -32,768
1
0
When the instruction
Machine Format 030 Assembler Format Op Code R
1
, O
2 (X
2
, 8
2
)
CH 4, X'30'(O, 13)
is executed, the contents oflocations 16080-16081 are
fetched, expanded to 32 bits (the sign bit is propagated to
the left), and compared with the contents of register 4. Be­ cause the two numbers are equal, condition code 0 is set.
Compare logical (Cl, ClR, CLI, ClC)
The COMPARE LOGICAL instructions differ from the
algebraic instructions (C, CR) in that all quantities are
handled as if unsigned.
Compare Logical (CL R)
Assume that:
Register 1 contains 00 00 00 01 Register 2 contains FF FF FF FF
Execution of the instruction
Machine Format Op Code R1 R2 Assembler Format Op Code R
1
, R2
CLR 1,2
sets condition code 1. A condition code 1 indicates that the
first operand is lower than the second. However, if an
algebraic compare instruction had been executed, condition
code 2 would have been set, indicating that the first oper­ and is higher. During algebraic comparison, the contents of
register 1 are interpreted as + 1 and the contents of register
2 as -1. During logical comparison, the leftmost byte of
register 2 is compared with the leftmost byte of register 1;
each byte is interpreted as a binary number. In this case:
Leftmost byte of register 1: 0000 0000 2 010 Leftmost byte of register 2: 1111 11112 =:: 25510
294 System/370 Principles of Operation If the leftmost bytes are equal, the next two bytes are
compared, etc., until either an inequality is discovered or
the contents of the registers are exhausted.
Compare Logical Immediate (CLI) The CLI instruction logically compares a byte from the
instruction stream with a byte from storage. For example,
assume that:
Register 10 contains 00 00 17 00 Storage location 1703 contains 7E
Execution of the instruction
Machine Format Op Code 0
1 95
AF I A I 003 Assembler Format
o p Code 0
1 (8
1
), 12 CLI 3(10),X'AF'
sets condition code 1, indicating that the first operand (the
quantity in main storage) is lower than the second (imme­ diate) operand.
Compare Logical Characters (CLC)
The COMPARE LOGICAL CHARACTERS instruction can
be used to perform the logical comparison of storage fields
up to 256 bytes in length. For example, assume that the
following two fields of data are in storage:
Field 1
1886 1891 I 01 1
06 1 C81 05
1 E2/ 06
1 05
1
68 I C1 1
48 I C2148 I Field 2 1900 1908 I 01 I 06 I C81 05
1 E2 I 06
1 05
1 68 I C
1 1
48 I C31 48 I Also assume:
Register 6 contains 00 00 18 80 Register 7 con tains 00 00 19 00 Execution of the instruction
Machine Format Op Code L 05 08 006 Assembler Format Op Code 0
1 (L, 8
1
), O
2 (8
2
)
CLC 6(12,6),0(7) 000 sets condition code 2, indicating that the contents of field
1 are higher in value than the contents of field 2.
Because CLC compares bytes on an unsigned binary basis,
the instruction can be used to collate fields composed of