COMPARE LOGICAL (CLR, CL, CLI, CLC) instruction 125
example 294 COMPARE LOGICAL LONG (CLCL) instruction 126
example 295
compatibility and compatibility limitations in
System/370 2
compatibility of I/O operations 191
completion (method of ending instruction execu tion) 74
conceptual sequence (order) in instruction execution 23
concluding (termination of) I/O at operation initiation 222
by HALT I/O or HALT DEVICE 224
due to equipment malfunction 226
of data transfer 223
of I/O operations 222
concurrent within a block, storage references 25
condition code (CC)
deferred (DCC), in CSW 229
setting for I/O instructions 195
setting, summary of (see Appendix E)
condition code in PSW 22
BC mode 34
EC mode 34
program mask and condition code validity bit 180 conditions
determining response to orders 98
external interruption 84 I/O interruption 226, 88
precluding interpretation of an order code 98
program interruption 75
configuration controls 245
console device (of the system console) 243
console, system 243,18
control
check-stop 181
logout 181
panel, system 243
store status 54
system 29
control command, I/O 219
control panel, system 243
control register 36, 16
field and bit assignments 37
machine check controls 181,183
save area (machine-check extended interruption
information) 177
valid bit (machine-check interruption code) 181
control unit 187
address in device address 192
attachment in system 187
description of 18
functions 187
selection 192
control unit end (I/O unit status condition) 230 CONVERT TO BINARY (CVB) instruction 127
example 296
CONVERT TO DECIMAL (CVD) instruction 128
example 296
count 236
in CCW 211
in CSW 238
counter, instruction (see instruction address in PSW) coupled general registers 16 Page of GA22-7000-4 Revised September 1, 1975
By TNL: GN22-0498 CPU (central processing unit)
address iden tifica tion 101 general description 15
initialization reset 51
power-on reset 53
reset 50 reset order 98
retry 172
signaling and response 97 CPU states 30 problem/supervisor 30 stopped/ operating 30 wait/running 30 CPU timer 48
interruption 48, 88
interruption submask 88
mask bit (in control register 0) 88
priority of interruption 86.
save area (machine-check extended interruption
information timing facilities) (see timing facilities) 177
valid bit in ·machine-check interruption code 180 CSW (channel status word) 228
current PSW 16, 22
customer-engineer-control section (of the system control
panel) 248
D field of an instruction 20 damage condition 175
DAT (see dynamic address translation)
data
address (in CCW) 211
block, I/O (definition) 210 chaining (in I/O operations) 213,191
check (sense data) 220 exception 78
format
decimal instruction 147
fixed-point numbers 116
floating-point instruction 157
general instruction 116
formats 14
prefetching and buffering of in channel 212
transfer (I/O) concluding of 223
modes of 187
decimal
data format 147
divide exception 78
number representation 148
operands 147
overflow exception 78
packed 147
sign codes 147,148
zoned 147
decision making by BRANCH ON CONDITION instruction 22
deferred condition code (DCC) 229
degradation
machine-check interruption condition 179, 175
report mask bit 182
delayed bit, machine-check interruption code 180 deletion, unit 172
destructive overlap (in MOVE LONG) 133
detect field (in limited channel logout) 240 Index 317

Page of GA22-7000-4 Revised September 1, 1975
By TNL: GN22-0498
device
addressing, I/O 192
validity flag 241
description 18
end (I/O unit status condition) 232
error, I/O 197
general information 186
not operational (I/O system state) 193
working % system state) 193 (sa also I/O devices and control units) DIAGNOSE instruction 103 digit, decimal 147
digit selector in editing 150 direct-control facility 46
disabling, enabling interruptions 70 displacement (in operand designation) 20 display-and-enter controls 245
DIVIDE (DDR, DD, DER, DE) instruction 163
DIVIDE (DR, D) instruction 128
example 296
DIVIDE DECIMAL (DP) instruction 149
example 306 doubleword (definition) 14
doubleword-concurrent fetch 27
dynamic address translation 57
addresses translated 62
addressing exception during 61,68
control 58
control register 0 58
control register 1 59
exceptions 68, 81
page-translation exception 79, 62
segment-translation exception 79,61
translation-specification exception 79,62
formats, summary 68
page invalid bit 60 page size 59
page table
address 60 entry 60 entry fetch sequence 24
length 60 lookup '61 process 60 segment invalid bit 60 segment size 59
segment table
address 59
entry 59
entry fetch sequence 24
length 59
lookup 61
states of translation-table entries 65
table entries
active 66
attached 65
valid 65
tables 59
modification of 66
translation lookaside buffer 65
EBClDIC chart (see Appendix H)
EDIT AND MARK (EDMK) instruction 152
example 307 318 System/370 Principles of Operation EDIT (ED) instruction 150 example 306 emergency-pull switch 245
emergency signal
external interruption 87
order 97
enable-system-clear key 245
enabling and disabUng interruptions 70 ending of instruction execution, methods of 74
equipment check (sense data) 220 status bit 99
error
program, handling of 75
state of time-of-day clock 46
storage
corrected bit 180 key in storage 180 uncorrected bit 180 error checking and correction (ECC), redundancy correction 172
event mask for program event recording 40 events, interruption causing 80 exception conditions
during decimal operations 149
during EXECUTE operations 129
during fixed-point operations 116
during floating-point operations 161
exceptions associated withPSW 35
excess-64 binary notation 157 EXCLUSIVE OR (XR, X, XI,XC) instruction 128
example 297
EXECUTE (EX) instruction 129
example 298
exceptions during execution 129
execute exceptioJ;l 76
execution, program 19
exigent machine-check interruption conditions
definition of 175
handling of (interruption action) 175, 177
explicit (address) translation 60 exponent
in a floating-point number 157
overflow exception 78
underflow exception 79
extended control mode (EC) 32 PSW format 34
extended-floating-point number 158
extended logout (see machine-check extended logout)
extended logout pointer, I/O 240 external-call
external interruption 87
order 97
pending, status bit 99
external damage, machine-check interruption condition 179, 175
report mask 182
external interruption 84
clock comparator 87
CPU timer 88
emergency signal 87
external call 88
external signal 86
identification in main storage 90 interrupt key 86
interval timer 86
malfunction alert 86