parallel or in series; the width of the arithmetic unit,

the multiplicity of the shifting paths, and the degree

of simultaneity in performing the different types of

arithmetic differ from oneCPU to another without af

fecting the logical appearance of the design.

Arithmetic and logical operations performed by theCPU fall into four classes: fixed-point arithmetic, deci

mal arithmetic, floating-point arithmetic, and logical

operations. These classes differ in the data formats

used, the registers involved, the operations provided,

and the way thefield length is stated.

Fixed-Point Arithmetic

The basic arithmetic operand is the 32-bit fixed-point

binary word. Sixteen-bit halfword operands may be

specified in most operations for improved performancc

or storage utilization.See Figure 6. To preserve

precision, some products and all dividends are 64 bits

long.

Integer

o 1 15

Integer

o 1 31

Figure 6. Fixed-Point Number Formats

Because the 32-bit word size conveniently accom

modatesa 24-bit address, fixed-point arithmetic can

be used both for integer operand arithmetic and for

address arithmetic. This combined usage provides

economy and permits the entire fixed-point instruction

set and several logical operations to be used in ad

dress computation. Thus, multiplication, shifting, and

logical manipulation of address components are pos

sible.

The absence of recomplementation and the ease of

extension and truncation make two's-complement no

tation desirable for address components andfixed point operands. Since integer and addressing algorisms

often require repeated reference to operands or inter

mediate results, the use of multiple registers is advan

tageous in arithmetic sequences and address calcula

tions.

Additions, subtractions, multiplications, divisions,

and comparisons are performed upon one operand in

a register and another operand either in a register or

from storage. Multiple-precision operation is made

convenient by the two's-complement notation and by

recognition of the carry from one word to another. A

10

word in one register or a double word in a pair of

adjacent registers may be shifted left or right. A pair

of conversion instructions -CONVERT TO BINARY and CONVERT TO DECIMAL -provides transition between

decimal and binary radix (number base) without the

use of tables. Multiple-register loading and storing in

structions facilitate subroutine switching.Decimal Arithmetic

Decimal arithmetic is designed for processes requiring

few computational steps between the source input

and the documented output. This type of processing

is frequently found in commercial applications, par

ticularly when use is made of problem-oriented lan

guages. Because of the limited number of arithmetic

operations performed on each item of data, radix con

version from decimal to binary and back to decimal

is not justified, and the use of registers for intermedi

ate results yields no advantage over storage-to-storage

processing. Hence, decimal arithmetic is provided,

and both operands and results are located in storage.

Decimal arithmetic includes addition, subtraction,

multiplication, division, and comparison.

Decimal numbers are treated as signed integers with

a variable-field-length format from one to 16" bytes

long. Negative numbers are carried in true form.

The decimal digits0-9 are represented in the four

bit binary-cod ed-decimal form by0000-1001, respec

tively. The codes1010-1111 are not valid as digits and

are reserved for sign codes;1011 and 1101 represent

a minus; the other four codes are interpreted as plus.

The sign codes generated in decimal arithmetic de

pend upon the character set preferred (Figure 7).

When the expanded binary coded decimal interchange

code(EBCDIC) is preferred, the codes are 1100 and 1101. When the ASCII set, expanded to eight bits, is

preferred, the codes are1010 and 1011. The choice

between the two code sets is determined by a mode

bit.

Decimal operands are represented by four-bit bin

ary-coded-decimal digits packed two to a byte. They

appear infields of variable length and are accompa

nied by a sign in the rightmost four bits of the low-

Digit Code Sign Code0 0000 + 1010 1 0001 - 1011 2 0010 + 1100 3 0011 - 1101 4 0100 + 1110 5 0101 + 1111

60110 7 0111 8 1000 9 1001 Pigure 7. Bit Codes for Digits and Signs

the multiplicity of the shifting paths, and the degree

of simultaneity in performing the different types of

arithmetic differ from one

fecting the logical appearance of the design.

Arithmetic and logical operations performed by the

mal arithmetic, floating-point arithmetic, and logical

operations. These classes differ in the data formats

used, the registers involved, the operations provided,

and the way the

Fixed-Point Arithmetic

The basic arithmetic operand is the 32-bit fixed-point

binary word. Sixteen-bit halfword operands may be

specified in most operations for improved performancc

or storage utilization.

precision, some products and all dividends are 64 bits

long.

Integer

o 1 15

Integer

o 1 31

Figure 6. Fixed-Point Number Formats

Because the 32-bit word size conveniently accom

modates

be used both for integer operand arithmetic and for

address arithmetic. This combined usage provides

economy and permits the entire fixed-point instruction

set and several logical operations to be used in ad

dress computation. Thus, multiplication, shifting, and

logical manipulation of address components are pos

sible.

The absence of recomplementation and the ease of

extension and truncation make two's-complement no

tation desirable for address components and

often require repeated reference to operands or inter

mediate results, the use of multiple registers is advan

tageous in arithmetic sequences and address calcula

tions.

Additions, subtractions, multiplications, divisions,

and comparisons are performed upon one operand in

a register and another operand either in a register or

from storage. Multiple-precision operation is made

convenient by the two's-complement notation and by

recognition of the carry from one word to another. A

10

word in one register or a double word in a pair of

adjacent registers may be shifted left or right. A pair

of conversion instructions -

decimal and binary radix (number base) without the

use of tables. Multiple-register loading and storing in

structions facilitate subroutine switching.

Decimal arithmetic is designed for processes requiring

few computational steps between the source input

and the documented output. This type of processing

is frequently found in commercial applications, par

ticularly when use is made of problem-oriented lan

guages. Because of the limited number of arithmetic

operations performed on each item of data, radix con

version from decimal to binary and back to decimal

is not justified, and the use of registers for intermedi

ate results yields no advantage over storage-to-storage

processing. Hence, decimal arithmetic is provided,

and both operands and results are located in storage.

Decimal arithmetic includes addition, subtraction,

multiplication, division, and comparison.

Decimal numbers are treated as signed integers with

a variable-field-length format from one to 16" bytes

long. Negative numbers are carried in true form.

The decimal digits

bit binary-cod ed-decimal form by

tively. The codes

are reserved for sign codes;

a minus; the other four codes are interpreted as plus.

The sign codes generated in decimal arithmetic de

pend upon the character set preferred (Figure 7).

When the expanded binary coded decimal interchange

code

preferred, the codes are

between the two code sets is determined by a mode

bit.

Decimal operands are represented by four-bit bin

ary-coded-decimal digits packed two to a byte. They

appear in

nied by a sign in the rightmost four bits of the low-

Digit Code Sign Code

6