Divide Decimal The signed, packed decimal field at location 2000-2004 is to be divided by the packed decimal field at location 3000-3001.. Assume:
Reg 12
Reg 13
Loc 2000-2004 (before)
Loc 3000-3001 The instmction is: Op Code L, L, 8, 00 00 18 00 00 00 25 00 01 23 45 67 8+
32 1-
0, 200 113 I Loc 2000-2004 (after) 38 46 0- 01 8+ o. 500 i'iJ where the quotient is 38460- and the remainder is 018+. Condition code: unchanged.
Pack
Assume locations 1000-1004 contain the following: ZI Z2 Z:3 Z4 S5 where Z =: four-bit zone code S == four-bit sign code
The field is to be in packed format with two leading
zeros and placed in location 2500-2503. Reg 12
Reg 13
Loc 1000-1004 Loc 2500-2503 (before)
The instruction is: k L 00 00 10 00 00 00 25 00 ZI Z2 Z3 Z4 S5 ABC D
0,
o
Loc 2500-2503 (after) 00 12 34 5S Condition code: unchanged.
Unpack
o
Assume locations 2501-2503 contains the following
fields:
12 34 5S This field is to be put into zoned format and placed in
the locations 1000-1004 where: S is a four bit sign
code.
Reg 12
Reg 13
Loc 2501-2503 Loc 1000··1004 (before)
The instruction is: k L 4121121 0 and results in 00 00 10 00 00 00 25 00 12 34 5S ABC D E
0, B.
Loc 1000-1004 (after) ZI Z2 Z3 Z4 S5 where Z is a four-bit zone code.
Condition codc: unchanged.
124
Move with Offset The unsigned three-byte field at location 4500-4502 is
to be moved to location 5600-5603 and given the sign
of the one byte field located at 5603. Assume: Reg 12
Reg 15
Loc 5600-5603 (before)
Loc 4500-4502 The instruction is: Op Code L, L2 8, Loc 5600-5603 (after)
Condition code: unchanged.
Move Immediate 00 00 50 00 00 00 40 00 77 88 99 0+ 12 34 56
0, B. 600 115 1 01 23 45 6+
O 2 500 i'iJ A dollar sign ($) is to be placed in location 2100, leaving locations 2101-2105 unchanged. Let Z rep­
resent a four-bit zone.
Assume:
Reg 12
Loe 2100-2105 (before)
The instruction is: Op Code MVI $
Loc 2100-2105 (after)
Condition code: unchanged.
Move Numeric 00 00 20 00 ZO ZI Z2 Z3 Z5 ZO 8, 0, 12 100 $ ZI Z2 Z3 Z5 ZO Let Z and Y represent four-bit zones. The numeric
parts of the eight-bit characters in the field at locations 6070-6074 are to be replaced by the numeric parts of
eight-bit characters at locations 8080-8084. Assume: Reg 12 Beg 15
Loc 6070-6074 (before)
Loc 8080-8084 The instruction is: 00 00 60 00 00 00 80 00 Yl Y2 Y3 Y4 Y5 Z3 Z6 Z9 Z7 Z8 Loe 6070-6074 (after) Y3 Y6 Y9 Y7 Y8
Condition code: unchanged.
Move Zones
Let Z and Y represent four-bit zones in the eight-bit
characters making up the fields at location 2006-2010 and 3007-3011, respectively. The zones of the field at 2006-2010 arc to be replaced by the zones from loca­
tion 3007-3011.

Assume:
Reg 12
Reg 15
Loc 2006-2010 (before)
Loc 3007-3011 The instruction is: Op Code B, 00 00 20 00 00 00 30 00 Zl Z4 Z7 Z8 Z5
Y8 Y7 Y4 Y6 Y8
D,
6
Loc 2006-2010 (after) Y1 Y4 Y7 Y8 Y5
Condition codc: unchanged.
AND (Register to Register)
When two operands are combined by an AND, they
are matched bit for bit. If corresponding bits are both
1, the result is 1. If either is 0, the result is O. For
example, if the logical AND of register 5 and 6 is to
be taken,
Assume: Reg 6
Reg 5 (before)
The instruction is: Op Code RJ
NR 5 00000000000000000000000001011011 00000000000000000000000001110110 6 Reg 5 00000000 00000000 00000000 01010010 Condition code = 1; not all-zero result. OR When two operands are combined by an OR, they are
matched bit-for-bit. If either of the corresponding bits
is 1, the result is 1. If both are 0, the result is O. For
example, if the logical OR of register 5 and 6 is to be
taken,
Assume:
Reg 6 00000000 00000000 00000000 10110111 Reg 5 (before) 00000000 00000000 00000000 1110 11 0 1
The instruction is: Op Code OR 5 6
Heg 5 (after) 00000000 00000000 00000000 11111111
Condition code = 1; not all-zero result.
Exclusive OR When two operands are combined by an EXCLUSIVE OR, they are matched bit-for-bit. If the corresponding bits
match (both ° or both 1), the result is O. If they differ,
the result is 1. For example, if the EXCLUSIVE OR of
register 5 and 6 is to be taken,
Assume:
Reg 6 00000000 00000000 00000000 10110111 Reg 5 (before) 00000000 00000000 00000000 111011 0 1
The instruction is: Op Code R, XR 5 6 Beg 5 (after) 00000000 00000000 00000000 01011010 Condition code = 1; not all-zero result.
Test Under Mask
Test bit positions 0, 2, 3, and 6 of a given byte in
storage to determine if all of these bit positions contain
ones. A TEST UNDER MASK with a mask of 10110010 ==
178
lO is used. The byte to be tested is stored at loca­
tion 1250 and contains 01101101. Assume: Beg 10 00 00 12 00 The instruction is: Op Code '" D, TM 178 10 50 t-.1ask from TM
Byte testcd
Selected result
Condition code
bits are 1. Insert Character 10110010 01101101 0- 10 -- 0- 1; some selected hits are 0, some selected
The character at location 4200 is to be inserted into
the low-order eight bits of register 7.
Assume:
Reg 7 (before)
Heg4 Reg 5
Loc 4200 The instruction is: Op Code R, Ie 7 00000000 10110110 11000101 01101101 00 00 02 00 00 00 30 00 00001011 x, 4 5 1000 J
Reg 7 (after) 00000000 101101101100010100001011 Condition code: unchanged.
Load Address
The effective address obtained by adding 1000 to the
low-order 24 bits of general registers 3 and 2, is to be
placed in general register 4.
Assume:
Reg 4 (before)
Reg 3
Reg 2
The instruction is: Op Code LA 4 Reg 4 (after)
3
Condition code: unchanged.
73 16 00 12 00 03 00 10 00 00 02 00 2 00 03 12 10 1000 Appendix A 125