Supervisor or Problem State: In the problem state,
all 110 instructions and a group of control instructions
are invalid. In the supervisor state, all instructions
are valid. The choice of problem or supervisor state is
determined by bit 15 of the psw.
Protection feature
The Protection Feature protects the contents of cer­
tain areas of storage from destruction due to errone­
ous storing of information during the execution of a
program. This protection is achieved by identifying
blocks of storage with a storage key and comparing
this key with a protection key supplied with the data
to be stored. The detection of a mismatch results in
a protection interruption.
For protection purposes, main storage is divided in­
to blocks of 2,048 bytes. A four-bit storage key is as­
sociated with each block. When data are stored in a
storage block, the storage key is compared with the
protection key. When storing is specified by an in­
struction, the protection key of the current psw is
used as the comparand. When storing is specified by
a channel operation, a protection key supplied by the
channel iis used as the comparand. The keys are said
to match when they are equal or when either one is
zero.
The storage key is not part of addressable storage.
The key is changed by SET STORAGE KEY and is in­
spected by INSERT STORAGE KEY. The protection key in
the psw occupies bits 8-11 of that control word. The
protection key of a channel is recorded in bits 0-3 of
the csw, which is stored as a result of the channel
operation. When a protection mismatch due to an in­
struction is detected, the execution of this instruction
is suppressed or terminated, and the program execu­
tion is altered by an interruption. The protected stor­
age location always remains unchanged. Protection mismatch due to an 110 operation causes the data
transmission to be terminated in such a way that the
protected storage location remains unchanged. The
mismatch is indicated in the csw stored as a result of
the operation.
Timer f'eature
The timer is provided as an interval timer and may
be programmed to maintain the time of day. The
timer consists of a full word in main storage location 80. The timer word is counted down at a rate of 50 or 60 cycles per second, depending on line frequency.
The timer word is treated as a signed integer follow­
ing the rules of fixed-point arithmetic. An external in­
terruption condition is signaled when the value of the
18
timer word goes from positive to negative. The full
cycle time of the timer is 15.5 hours.
An updated timer value is available at the end of
each instruction execution but is not updated in the
stopped state. The timer is changed by addressing
storage location 80. As an interval timer, the timer is
used to measure elapsed time over relatively short in­
tervals. It can be set to any value at any time.
Direct Control feature
The direct control feature provides two instructions,
READ DIRECT and WRITE DIRECT, and six external inter­
ruption lines. The read and write instructions provide
for the transfer of a single byte of information be­
tween an external device and the main storage of the
system. It is usually most desirable to use the data
channels of the system to handle the transfer of any
volume of information and u.se the direct data control
feature to pass controlling and synchronizing informa­
tion between the CPU and special external devices.
Each of the six external signal lines, when pulsed,
sets up the conditions for an external interruption.
Multisystem feature
The design of System/360 permits communication be­
tween individual cpu's at several transmission rates.
The communication is possible through shared con­
trol units, through a channel connector and through
shared storage. These features are further augmented
by the direct control feature and the multisystem
feature. The direct control feature, described in
the previous section, can be used to signal from one CPU to another. The multisystem feature provides di­
rect address relocation, malfunction indications, and
electronic CPU initialization.
The relocation procedure applies to the first 4,096 bytes of storage. This area contains all permanent
storage assignments and, generally, has special signifi­
cance to supervisory programs. The relocation is ac­
complishcd by inserting a 12-bit prefix in each address
which has the high-order 12 bits set to zero and hence,
pertains to location 0-4095. Two manually set prefixes
are available to permit the use of an alternative area
when storage malfunction occurs. The choice between
the prefixes is determined by a prefix trigger set dur­
ing initial program loading.
To alert one CPU to the possible malfunction of an­
other CPU, a machine check-out signal is provided,
which can serve as an external interruption to another cpu. Finally, the feature includes provision for initial
program loading initiated by a signal from another CPU.

Input jOutput Input / Output Devices and Control Units
Input/output operations involve the transfer of infor­
mation to or from main storage and an I/O device.
Input/output devices include such equipment as card
read punches, magnetic tape units, disk storage, drum
storage, typewriter-keyboard devices, printers, TELE­ PROCESSINC@ devices, and process control equipment.
Many I/O devices function with an external docu­
ment, such as a punched card or a reel of magnetic
tape. Some I/O devices handle only electrical signals,
such as those found in process-control networks. In
either case, I/O device operation is regulated by a
control unit. The control-unit function may be housed
with the I/O device, as is the case with a printer, or a
separate control unit may be used. In all cases, the
control-unit function provides the logical and buffer­ ing capabilities necessary to operate the associated I/O device. From the programming point of view,
most control-unit functions merge with I/O device
functions.
Each control unit functions only with the I/O de­
vice for which it is designed, but each control unit
has standard-signal connections with regard to the
channel to which it is attached. Input / Output Interface So that the CPU may control a wide variety of I/O devices, all control units are designed to respond to a
standard set of signals from the channel. This control­
unit-to-channel connection is called the I/O interface.
It enables the CPU to handle all I/O operations with
only four instructions. Channels Channels connect with the CPU and main storage and,
via the I/O interface, with control units. Each chan­
nel has facilities for:
Accepting I/O instructions from the CPU Addressing devices specified by I/O instructions
Fetching channel control information from main storage
Decoding control information
Testing information for validity
Executing control information
Providing control signals to the I/O interface
Accepting control-response signals from the I/O interface
Buffering data transfers Checking parity of bytes transferred Counting the number of bytes transferred
Accepting status information from I/O devices
Maintaining channel-status information
Sending requested status information to main storage
Sequencing interruption requests from I/O devices
Signaling interruptions to the CPU A channel may be an independent unit, complete
with necessary logical and storage capabilities, or it
may share CPU facilities and be physically integrated
with the CPU. In either case, channel functions are
identical.
The System/360 has two types of channels: multi­
plexor and selector. The channel facility necessary to
sustain an operation with an I/O device is called a
subchannel. The selector channel has one subchannel'
the multiplexor channel has multiple subchannels. '
Channels have two modes of operation: burst and
multiplex.
In the burst mode, all channel facilities are mono­
polized for the duration of data transfer to or from a
particular I/O device. The selector channel functions
only in the burst mode.
The multiplexor channel functions in both the burst
mode and in the multiplex mode. In the latter mode,
the multiplexor channel sustains simultaneous I/O op­
erations on several subchannels. Bytes of data are
interleaved together and then routed to or from the
selected I/O devices and to or from the desired loca­
tions in main storage. Input / Output Instructions The System/360 uses only four I/O instructions: START I/O TEST CHANNEL TEST I/O HALT I/O Input/output instructions can be executed only
while the CPU is in the supervisor state. Start I/O The START I/O initiates an I/O operation. The adoress part of the instruction specifies the channel and I/O device.
Test Channel
The TEST CHANNEL scts the condition code in the psw
to indicate the state of the channel addressed bv the instruction. The condition code then indicates nel available, interruption condition in channel, chan­
neJ working, or channel not operational.
Test I/O The TEST I/O causes a csw to be stored in location 64
of main storage, if the device addressed by TEST I/O has specified conditions for interruption. The csw
provides information on the status of the channel and I/O devices.
Halt I/O The HALT I/O terminates a channel operation.
System Structure 19