interruption for the significance exception does not
occur; rather, the characteristic is made zero, yielding
a true zero result. Exponent underflow does not occur
for a zero fraction.
The sign of the sum is derived by the rules of
algebra. The sign of a sum with zero result fraction
is always positive.
Resulting Condition Code: o Result fraction is zero
1 Result is less than zero
2 Result is greater than zero
3 Result exponent overflows
Program Interruptions:
Operation (if floating-point feature is not in-
stalled)
Addressing (AE and AD only)
Specification
Significance
Exponent overflow
Exponent underflow
Programming Note
Interchanging the two operands in a floating-point
addition does not affect the value of the sum.
Add Unnormalized AUR RR (Short Operands) I 3E Rl I R2 I 0 78 11 12 15
AU RX (Short Operands) I 7E Rl I X
2 I B2 D2 0 78 11 12 1516 1920 31
AWR RR (Long Operands) I 2E Rl I R2 I 0 78 11 12 15
AW RX (Long Operands) I 6E Rl I X
2 I B2 0 78 11 12 1516 1920 31
The second operand is added to the first operand, and
the unnormalized sum is placed in the first operand
location.
In short-precision, the low-order halves of the float­
ing-point registers are ignored and remain unchanged.
After the addition the intermediate sum is truncated
to the proper fraction length.
When the resulting fraction is zero and the signifi­
cance mask bit is one, a significance exception exists
and a program interruption takes place. When the
resulting fraction is zero and the significance mask
bit is zero, the program interruption for the signifi­
cance exception does not occur; rather, the character­
istic is made zero, yielding a true zero result.
Leading zeros in the result are not eliminated by
normalization, and an exponent underflow cannot
occur.
The sign of the sum is derived by the rules of
algebra. The sign of a sum with zero result fraction is
always positive.
Resulting Condition Code: o Result fraction is zero
1 Result is less than zero
2 Result is greater than zero
3 Result exponent overflows
Program Interruptions:
Operation (if floating-point feature is not in-
stalled)
Addressing (AU and A w
only)
Specification
Significance
Exponent overflow
Subtract Normalized SER RR (Short Operands) I 3B Rl I R2 I 0 78 11 12 15 SE RX (Short Operands) I 7B Rl I X
2 I B2 D2 0 78 11 12 1516 1920 31 SDR RR (Long Operands) I 2B Rl I R2 I 0 78 11 12 15 SD RX (Long Operands)
6B
7 8 11 12 1516 1920 31
The second operand is subtracted from the first op­
erand, and the normalized difference is placed in the fi'rst operand location.
Floating-Point Arithmetic 45

In short-precision, the low-order halves of the Hoat­
ing-point registers are ignored and remain unchanged.
The SUBTRACT NORMALIZED is similar to ADD NORMAL­
IZED, except that the sign of the second operand is
inverted before addition.
The sign of the difference is derived by the rules of
algebra. The sign of a difference with zero result
fraction is always positive.
Resulting Condition Code:
o Result fraction is zero
1 Result is less than zero
2 Result is greater than zero
3 Result exponent overHows
Program Interruptions: Operation (if Hoating-point feature is not in-
stalled)
Addressing (SD and SE only)
Specification
Significance
Exponent overHow
Exponent underHow
Subtract Unnormalized SUR RR. (Short Operands)
3F
78 11 12 15 SU RX (Short Operands)
7F
7 8 11 12 1516 1920 SWR (Long Operands)
2F
7 8 11 12 15 SW RX (Long Operands)
6F
7 8 11 12 1516 1920 D2
31
31
The second operand is subtracted from the first op­
erand, and the unnormalized difference is placed in
the first operand location.
In short-precision, the low-order halves of the Hoat­
ing-point register are ignored and remain unchanged.
46
The SUBTRACT UNNORMALIZED is similar to ADD UN­ NORMALIZED, except for the inversion of the sign of the
second operand before addition.
The sign of the difference is derived by the rules of
algebra. The sign of a difference with zero result
fraction is always positive.
Resulting Condition Code:
o Result fraction is zero
1 Result is less than zero
2 Result is greater than zero
3 Result exponent overHows
Program Interruptions: Operation (if Hoating-point feature is not in-
stalled)
Addressing (sw and su only)
Specification
Significance
Exponent overHow Compare CER RR (Short Operands)
39
7 8 11 12 15
CE RX (Short Operands) I 79 Rl I X
2 I B2 0 7 8 11 12 1516 1920 CDR RR (Long Operands) I 29 Rl I R2 I 0 78 11 12 15
CD RX (Long Operands) I 69 Rl I X
2 I B2 0 7 8 11 12 1516 1920 31
31
The first operand is compared with the second op­
erand, and the condition code indicates the result.
In short-precision, the low-order halves of the Hoat­
ing-point registers are ignored.
Comparison is algebraic, taking into account the
sign, fraction, and exponent of each number. An expo­
nent inequality is not decisive for magnitude determi­
nation since the fractions may have different numbers
of leading zeros. An equality is established by follow­
ing the rules for normalized Hoating-point subtraction.
When the intermediate sum, including a possible