Permanent Storage Assignment ADDRESS LENGTH PURPOSE o 0000 0000 double-word Initial program loading PSW 8 0000 1000 double-word Initial program loading CCW 1
16 0001 0000 double-word Initial program loading CCW2 24 00011000 double-word External old PSW 32 0010 0000 double-word Supervisor call old PSW 40 0010 1000 double-word Program old PSW 48 0011 0000 double-word Machine-check old PSW 56 0011 1000 double-word Input/output old PSW 64 01000000 double-word Channel status word
72 01001000 word Channel address word
76 0100 1100 word Unused 80 0101 0000 word Timer
84 0101 0100 word Unused
88 0101 1000 double-word External new PSW 96 01100000 double-word Supervisor call new PSW 104 0110 1000 double-word Program new PSW 112 01110000 double-word Machine-check new PSW 120 0111 1000 double-word Input/output new PSW 128 1000 0000 Diagnostic scan-out area 0 o The size of the diagnostic scan-out area depends on the par­
ticular model and I/O channels.
Condition Code Setting
Fixed-Point Arithmetic 0 1 2 3
AddH/F zero < zero > zero overflow
Add Logical zero not zero zero, carry
carry Compare H/F equal low high
Load and Test zero < zero > zero
Load Complement zero < zero > zero overflow
Load Negative zero < zero
Load Positive zero > zero overflow Shift Left Double zero < zero > zero overflow Shift Left Single zero < zero > zero overflow Shift Right Double zero < zero > zero Shift Right Single zero < zero > zero
Subtract H/F zero < zero > zero overflow Subtract Logical not zero zero, carry
carry Decimal Arithmetic
Add Decimal zero < zero > zero overflow Compare Decimal equal low high
Subtract Decimal zero < zero > zero overflow Zero and Add zero < zero > zero overflow
Floating-Point Arithmetic
Add Normalized S/L zero < zero > zero overflow
Add Unnormalized S/L zero < zero > zero overflow Compare S/L equal low high
Load and Test S/L zero < zero > zero
Load Complement S/L zero < zero > zero
Load Negative S/L zero < zero
Load Positive S/L zero > zero
Subtract
Normalized S/L zero < zero > zero overflow
Subtract Unnorm-
alized S/L zero < zero > zero overflow Logical Operaticlns AND zero not zero Compare Logical equal low high
Edit zero < zero > zero
Edit and Mark zero < zero > zero
Exclusive OR zero not zero OR zero not zero
Test Under Mask zero mixed one
Translate and Test zero incomplete complete Input / Output Oillerations Halt I/O not halted stopped not oper
working Start I/O available CSW busy not oper
stored
Test Channel not CSW working not oper
working ready
Test I/O available CSW working not oper
stored
CONDITION CODE SETTING NOTES available Unit and channel available
busy Unit or chanel busy
carry A carry out of the sign position occurred
complete Last result byte nonzero CSW ready Channel status word ready for test or interruption CSW stored Channel status word stored
equal Ope:rands compare equal
F Fullword
> zero Result is greater than zero
H Halfword
halted Data transmission stopped. Unit in halt-reset mode
high First operand compares high
incomplete Nonzero result byte; not last
L Long precision
< zero Result is less than zero
low First operand compares low
mixed Selected bits are both zero and one
not opel' Unit or channel not operational
not working Unit or channel not working
not zero Result is not all zero
one Selected bits are one
overflow Result overflows S Short precision
stopped Data transmission stopped
working Unit or channel working
zero Result or selected bits are zero
The condition code also may be changed by LOAD PSW, SET SYSTEM MASK, DIAGNOSE, and by an interruption.
Appendix G 147
Interruption Action INSTRUC­ TION INTERRUPTION SOURCE IDENTIFICATION
INTERRUPTION CODE MASK ILC EXE- PSW BITS 16-31 BITS SET CUTION Input / Output ( old PSW 56, new PSW 120, priority 4)
Multiplexor channel 00000000 aaaaaaaa 0 x complete Selector channell 00000001 aaaaaaaa 1 x complete Selector channel 2 00000010 aaaaaaaa 2 x complete Selector channel 3 00000011 aaaaaaaa 3 x complete Selector channcl4 00000100 aaaaaaaa 4 x complete Selector channel 5 00000101 aaaaaaaa 5 x complete Selector channel 6 00000110 aaaaaaaa 6 x complete
Program ( old PSW 40, new PSW 104, priority 2) Operation 00000000 00000001 1,2,3 suppress Privileged operation 00000000 00000010 1,2 suppress
Execute 00000000 00000011 2 suppress Protection 00000000 00000100 0,2,3 suppress/
terminate
Addressing 00000000 00000101 1,2,3 suppress/
terminate Specification 00000000 00000110 1,2,3 suppress
Data 00000000 00000 III 2,3 terminate
Fixed-point overflow 0000000000001000 36 1,2 complete
Fixed-point divide 0000000000001001 1,2 suppress/
complete
Decimal overflow 00000000 00001 0 1 0 37 3 complete
Decimal divide 00000000 00001011 3 suppress
Exponent overflow 00000000 00001100 1,2 terminate
Exponent underflow 00000000 00001101 38 1,2 complete Significance 00000000 0000 III 0 39 1,2 complete
Floating-point divide 0000000000001111 1,2 suppress
Supervisol' Call ( old PSW 32, new PSW 96, priority 2)
Instruction bits 00000000 r r r r r r r r 1 complete
External ( old PSW 24, new PSW 88, priority 3 )
External signal 1 00000000 xxxxxxxi 7 x complete
External signal 2 00000000 xxxxxx1x 7 x complete
External signal 3 00000000 xxxxx1xx 7 x complete
External signal 4 00000000 xxxx1xxx 7 x complete
External signal 5 00000000 xxxlxxxx 7 x complete
External signal 6 00000000 xx1xxxxx 7 x complete
Interrupt key 00000000 xlxxxxxx 7 x complete
Timer 00000000 lxxxxxxx 7 x complete
Machine Check (old PSW 48, new PSW 112, priority 1)
Machine malfunction 00000000 00000000 13 x terminate NOTES a
r
x
Device address bits
Bits of Rl and R2 field of SUPERVISOR CALL
Unpredictable
Instruction Length Recording INSTRUC- TION INSTRUC- I,ENGTH PEW BITS TION INSTRUCTION CODE BITS 0-1 LENGTH 0 00 Not available
1 01 00 One halfword
2 10 01 Two halfwords
2 10 10 Two halfwords
3 11 11 Three halfwords
148 INSTRUC- TION FORMAT RR
RX RS or SI SS Program Interruptions
The listings in the "Type" and "Exceptions" columns
of the tables in this section mean:
A Addressing exception C Condition code is set
D Data exception
DF Decimal-overflow exception
DK Decimal-divide exception
E Exponent-overflow exception
EX Execute exception
F Floating-point feature
FK Floating-point divide exception
IF Fixed-point overflow exception
IK Fixed-point divide exception
L New condition code loaded LS Significance exception
M Privileged-operation exception
N Normalized operation P Protection exception S Specification exception
T Decimal feature U Exponent-underflow exception Y Direct control feature Z Protection feature
Operation (OP) The operation code is not assigned or the assigned
operation is not available on the particular cpu. The operation is suppressed.
The instruction-length code is 1, 2, or 3.
Privileged Operation (M)
A privileged instruction is encountered in the problem
state.
The operation is suppressed.
The instruction-length code is 1 or 2.
NAME MNEMONIC TYPE EXCEPTIONS CODE Diagnose SI M, A,S 83
Halt 110 IIIO SI C M, 9E
Insert Storage Key ISK RRZ M, A,S 09 Load PSW LPSW SI L M, A,S 82
Head Direct RDD SI Y M,P,A 85 Sct Storage Key SSK RRZ M, A,S 08 Set System Mask SSM SI C M, A 80 Start 110 SIO SI C M, 9C Test Channel TCH SI C M, 9F
Test 110 TIO SI C M, 9D
Writc Direct WRD SI Y M, A 84
Execute (EX)
The subject instruction of EXECUTE is another EXECUTE. The operation is suppressed.
The instruction-length code is 2.
NAME
Execute
Protection (P)
MNEMONIC
EX TYPE RX EXCEPTIONS CODE A,S, EX 44
The storage key of a result location does not match
the protection key in the psw.
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